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Searched refs:GFXTIM_CR_TES_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9925 #define GFXTIM_CR_TES_Pos (0U) macro
9926 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
9928 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
9929 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32h7s7xx.h10449 #define GFXTIM_CR_TES_Pos (0U) macro
10450 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
10452 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
10453 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32h7s3xx.h10370 #define GFXTIM_CR_TES_Pos (0U) macro
10371 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
10373 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
10374 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32h7r7xx.h10002 #define GFXTIM_CR_TES_Pos (0U) macro
10003 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
10005 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
10006 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9774 #define GFXTIM_CR_TES_Pos (0U) macro
9775 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
9777 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
9778 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32u5g7xx.h10223 #define GFXTIM_CR_TES_Pos (0U) macro
10224 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
10226 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
10227 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32u5f9xx.h12900 #define GFXTIM_CR_TES_Pos (0U) macro
12901 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
12903 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
12904 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32u5g9xx.h13349 #define GFXTIM_CR_TES_Pos (0U) macro
13350 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
13352 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
13353 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18674 #define GFXTIM_CR_TES_Pos (0U) macro
18675 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
18677 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
18678 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32n657xx.h19616 #define GFXTIM_CR_TES_Pos (0U) macro
19617 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
19619 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
19620 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32n655xx.h19374 #define GFXTIM_CR_TES_Pos (0U) macro
19375 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
19377 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
19378 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */
Dstm32n647xx.h18916 #define GFXTIM_CR_TES_Pos (0U) macro
18917 #define GFXTIM_CR_TES_Msk (0x3UL << GFXTIM_CR_TES_Pos) /*!< 0x00000003 */
18919 #define GFXTIM_CR_TES_0 (0x1UL << GFXTIM_CR_TES_Pos) /*!< 0x00000001 */
18920 #define GFXTIM_CR_TES_1 (0x2UL << GFXTIM_CR_TES_Pos) /*!< 0x00000002 */