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Searched refs:GFXTIM_CR_SYNCS_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9935 #define GFXTIM_CR_SYNCS_Pos (8U) macro
9936 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
9938 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
9939 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32h7s7xx.h10459 #define GFXTIM_CR_SYNCS_Pos (8U) macro
10460 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
10462 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
10463 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32h7s3xx.h10380 #define GFXTIM_CR_SYNCS_Pos (8U) macro
10381 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
10383 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
10384 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32h7r7xx.h10012 #define GFXTIM_CR_SYNCS_Pos (8U) macro
10013 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
10015 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
10016 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9784 #define GFXTIM_CR_SYNCS_Pos (8U) macro
9785 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
9787 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
9788 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32u5g7xx.h10233 #define GFXTIM_CR_SYNCS_Pos (8U) macro
10234 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
10236 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
10237 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32u5f9xx.h12910 #define GFXTIM_CR_SYNCS_Pos (8U) macro
12911 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
12913 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
12914 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32u5g9xx.h13359 #define GFXTIM_CR_SYNCS_Pos (8U) macro
13360 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
13362 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
13363 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18684 #define GFXTIM_CR_SYNCS_Pos (8U) macro
18685 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
18687 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
18688 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32n657xx.h19626 #define GFXTIM_CR_SYNCS_Pos (8U) macro
19627 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
19629 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
19630 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32n655xx.h19384 #define GFXTIM_CR_SYNCS_Pos (8U) macro
19385 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
19387 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
19388 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */
Dstm32n647xx.h18926 #define GFXTIM_CR_SYNCS_Pos (8U) macro
18927 #define GFXTIM_CR_SYNCS_Msk (0x3UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000300 */
18929 #define GFXTIM_CR_SYNCS_0 (0x1UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000100 */
18930 #define GFXTIM_CR_SYNCS_1 (0x2UL << GFXTIM_CR_SYNCS_Pos) /*!< 0x00000200 */