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Searched refs:GFXMMU_SR_B0OF_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r7xx.h9258 #define GFXMMU_SR_B0OF_Pos (0U) macro
9259 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32l4s7xx.h9510 #define GFXMMU_SR_B0OF_Pos (0U) macro
9511 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32l4r9xx.h12377 #define GFXMMU_SR_B0OF_Pos (0U) macro
12378 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32l4s9xx.h12629 #define GFXMMU_SR_B0OF_Pos (0U) macro
12630 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h9527 #define GFXMMU_SR_B0OF_Pos (0U) macro
9528 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7b0xx.h9774 #define GFXMMU_SR_B0OF_Pos (0U) macro
9775 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7b0xxq.h9775 #define GFXMMU_SR_B0OF_Pos (0U) macro
9776 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7a3xxq.h9528 #define GFXMMU_SR_B0OF_Pos (0U) macro
9529 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7b3xx.h9781 #define GFXMMU_SR_B0OF_Pos (0U) macro
9782 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7b3xxq.h9782 #define GFXMMU_SR_B0OF_Pos (0U) macro
9783 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9827 #define GFXMMU_SR_B0OF_Pos (0U) macro
9828 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7s7xx.h10351 #define GFXMMU_SR_B0OF_Pos (0U) macro
10352 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7s3xx.h10272 #define GFXMMU_SR_B0OF_Pos (0U) macro
10273 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32h7r7xx.h9904 #define GFXMMU_SR_B0OF_Pos (0U) macro
9905 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9674 #define GFXMMU_SR_B0OF_Pos (0U) macro
9675 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32u599xx.h12682 #define GFXMMU_SR_B0OF_Pos (0U) macro
12683 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32u5g7xx.h10123 #define GFXMMU_SR_B0OF_Pos (0U) macro
10124 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32u5f9xx.h12800 #define GFXMMU_SR_B0OF_Pos (0U) macro
12801 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32u5a9xx.h13131 #define GFXMMU_SR_B0OF_Pos (0U) macro
13132 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32u5g9xx.h13249 #define GFXMMU_SR_B0OF_Pos (0U) macro
13250 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18576 #define GFXMMU_SR_B0OF_Pos (0U) macro
18577 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32n657xx.h19518 #define GFXMMU_SR_B0OF_Pos (0U) macro
19519 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32n655xx.h19276 #define GFXMMU_SR_B0OF_Pos (0U) macro
19277 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */
Dstm32n647xx.h18818 #define GFXMMU_SR_B0OF_Pos (0U) macro
18819 #define GFXMMU_SR_B0OF_Msk (0x1UL << GFXMMU_SR_B0OF_Pos) /*!< 0x00000001 */