/hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
D | stm32l4r7xx.h | 9278 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9279 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32l4s7xx.h | 9530 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9531 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32l4r9xx.h | 12397 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 12398 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32l4s9xx.h | 12649 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 12650 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xx.h | 9547 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9548 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7b0xx.h | 9794 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9795 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7b0xxq.h | 9795 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9796 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7a3xxq.h | 9548 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9549 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7b3xx.h | 9801 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9802 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7b3xxq.h | 9802 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9803 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 9847 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9848 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7s7xx.h | 10371 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 10372 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7s3xx.h | 10292 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 10293 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32h7r7xx.h | 9924 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9925 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u5f7xx.h | 9694 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 9695 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32u599xx.h | 12702 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 12703 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32u5g7xx.h | 10143 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 10144 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32u5f9xx.h | 12820 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 12821 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32u5a9xx.h | 13151 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 13152 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32u5g9xx.h | 13269 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 13270 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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/hal_stm32-latest/stm32cube/stm32n6xx/soc/ |
D | stm32n645xx.h | 18596 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 18597 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32n657xx.h | 19538 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 19539 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32n655xx.h | 19296 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 19297 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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D | stm32n647xx.h | 18838 #define GFXMMU_FCR_CB1OF_Pos (1U) macro 18839 #define GFXMMU_FCR_CB1OF_Msk (0x1UL << GFXMMU_FCR_CB1OF_Pos) /*!< 0x00000002 */
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