/hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
D | stm32l4r7xx.h | 9275 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9276 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32l4s7xx.h | 9527 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9528 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32l4r9xx.h | 12394 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 12395 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32l4s9xx.h | 12646 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 12647 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xx.h | 9544 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9545 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7b0xx.h | 9791 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9792 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7b0xxq.h | 9792 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9793 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7a3xxq.h | 9545 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9546 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7b3xx.h | 9798 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9799 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7b3xxq.h | 9799 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9800 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 9844 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9845 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7s7xx.h | 10368 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 10369 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7s3xx.h | 10289 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 10290 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32h7r7xx.h | 9921 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9922 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u5f7xx.h | 9691 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 9692 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32u599xx.h | 12699 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 12700 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32u5g7xx.h | 10140 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 10141 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32u5f9xx.h | 12817 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 12818 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32u5a9xx.h | 13148 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 13149 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32u5g9xx.h | 13266 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 13267 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32n6xx/soc/ |
D | stm32n645xx.h | 18593 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 18594 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32n657xx.h | 19535 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 19536 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32n655xx.h | 19293 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 19294 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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D | stm32n647xx.h | 18835 #define GFXMMU_FCR_CB0OF_Pos (0U) macro 18836 #define GFXMMU_FCR_CB0OF_Msk (0x1UL << GFXMMU_FCR_CB0OF_Pos) /*!< 0x00000001 */
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