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Searched refs:GFXMMU_B3CR_PBBA_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r7xx.h9324 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9325 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4s7xx.h9576 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9577 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4r9xx.h12443 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
12444 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4s9xx.h12695 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
12696 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h9601 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9602 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b0xx.h9848 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9849 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b0xxq.h9849 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9850 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7a3xxq.h9602 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9603 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b3xx.h9855 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9856 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b3xxq.h9856 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9857 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9898 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9899 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7s7xx.h10422 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
10423 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7s3xx.h10343 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
10344 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7r7xx.h9975 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9976 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9748 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
9749 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u599xx.h12756 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
12757 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5g7xx.h10197 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
10198 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5f9xx.h12874 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
12875 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5a9xx.h13205 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
13206 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5g9xx.h13323 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
13324 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18647 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
18648 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n657xx.h19589 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
19590 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n655xx.h19347 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
19348 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n647xx.h18889 #define GFXMMU_B3CR_PBBA_Pos (23U) macro
18890 #define GFXMMU_B3CR_PBBA_Msk (0x1FFUL << GFXMMU_B3CR_PBBA_Pos) /*!< 0xFF800000 */