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Searched refs:GFXMMU_B2CR_PBO_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r7xx.h9313 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9314 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32l4s7xx.h9565 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9566 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32l4r9xx.h12432 #define GFXMMU_B2CR_PBO_Pos (4U) macro
12433 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32l4s9xx.h12684 #define GFXMMU_B2CR_PBO_Pos (4U) macro
12685 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h9590 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9591 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7b0xx.h9837 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9838 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7b0xxq.h9838 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9839 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7a3xxq.h9591 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9592 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7b3xx.h9844 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9845 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7b3xxq.h9845 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9846 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9887 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9888 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7s7xx.h10411 #define GFXMMU_B2CR_PBO_Pos (4U) macro
10412 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7s3xx.h10332 #define GFXMMU_B2CR_PBO_Pos (4U) macro
10333 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32h7r7xx.h9964 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9965 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9737 #define GFXMMU_B2CR_PBO_Pos (4U) macro
9738 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32u599xx.h12745 #define GFXMMU_B2CR_PBO_Pos (4U) macro
12746 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32u5g7xx.h10186 #define GFXMMU_B2CR_PBO_Pos (4U) macro
10187 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32u5f9xx.h12863 #define GFXMMU_B2CR_PBO_Pos (4U) macro
12864 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32u5a9xx.h13194 #define GFXMMU_B2CR_PBO_Pos (4U) macro
13195 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32u5g9xx.h13312 #define GFXMMU_B2CR_PBO_Pos (4U) macro
13313 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18636 #define GFXMMU_B2CR_PBO_Pos (4U) macro
18637 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32n657xx.h19578 #define GFXMMU_B2CR_PBO_Pos (4U) macro
19579 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32n655xx.h19336 #define GFXMMU_B2CR_PBO_Pos (4U) macro
19337 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */
Dstm32n647xx.h18878 #define GFXMMU_B2CR_PBO_Pos (4U) macro
18879 #define GFXMMU_B2CR_PBO_Msk (0x7FFFFUL << GFXMMU_B2CR_PBO_Pos) /*!< 0x007FFFF0 */