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Searched refs:GFXMMU_B0CR_PBBA_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r7xx.h9300 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9301 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4s7xx.h9552 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9553 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4r9xx.h12419 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
12420 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32l4s9xx.h12671 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
12672 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h9577 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9578 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b0xx.h9824 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9825 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b0xxq.h9825 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9826 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7a3xxq.h9578 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9579 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b3xx.h9831 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9832 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7b3xxq.h9832 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9833 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h9874 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9875 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7s7xx.h10398 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
10399 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7s3xx.h10319 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
10320 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32h7r7xx.h9951 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9952 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h9724 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
9725 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u599xx.h12732 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
12733 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5g7xx.h10173 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
10174 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5f9xx.h12850 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
12851 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5a9xx.h13181 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
13182 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32u5g9xx.h13299 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
13300 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h18623 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
18624 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n657xx.h19565 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
19566 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n655xx.h19323 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
19324 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */
Dstm32n647xx.h18865 #define GFXMMU_B0CR_PBBA_Pos (23U) macro
18866 #define GFXMMU_B0CR_PBBA_Msk (0x1FFUL << GFXMMU_B0CR_PBBA_Pos) /*!< 0xFF800000 */