Home
last modified time | relevance | path

Searched refs:FSMC_R_BASE (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal.h80 #if defined(FSMC_R_BASE)
546 #if defined(FSMC_R_BASE)
Dstm32l1xx_ll_system.h88 #if defined(FSMC_R_BASE)
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101xg.h607 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address */ macro
687 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x00000000UL) /*!< FSMC Bank1 registers base addres…
688 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x00000104UL) /*!< FSMC Bank1E registers base addre…
689 #define FSMC_BANK2_3_R_BASE (FSMC_R_BASE + 0x00000060UL) /*!< FSMC Bank2/Bank3 registers base …
690 #define FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x000000A0UL) /*!< FSMC Bank4 registers base addres…
Dstm32f101xe.h594 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address */ macro
668 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x00000000UL) /*!< FSMC Bank1 registers base addres…
669 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x00000104UL) /*!< FSMC Bank1E registers base addre…
670 #define FSMC_BANK2_3_R_BASE (FSMC_R_BASE + 0x00000060UL) /*!< FSMC Bank2/Bank3 registers base …
671 #define FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x000000A0UL) /*!< FSMC Bank4 registers base addres…
Dstm32f100xe.h585 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address */ macro
664 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x00000000UL) /*!< FSMC Bank1 registers base addres…
665 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x00000104UL) /*!< FSMC Bank1E registers base addre…
Dstm32f103xe.h733 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address */ macro
813 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x00000000UL) /*!< FSMC Bank1 registers base addres…
814 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x00000104UL) /*!< FSMC Bank1E registers base addre…
815 #define FSMC_BANK2_3_R_BASE (FSMC_R_BASE + 0x00000060UL) /*!< FSMC Bank2/Bank3 registers base …
816 #define FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x000000A0UL) /*!< FSMC Bank4 registers base addres…
Dstm32f103xg.h740 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address */ macro
826 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x00000000UL) /*!< FSMC Bank1 registers base addres…
827 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x00000104UL) /*!< FSMC Bank1E registers base addre…
828 #define FSMC_BANK2_3_R_BASE (FSMC_R_BASE + 0x00000060UL) /*!< FSMC Bank2/Bank3 registers base …
829 #define FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x000000A0UL) /*!< FSMC Bank4 registers base addres…
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h869 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
974 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
975 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
976 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
977 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f205xx.h823 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
926 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
927 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
928 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
929 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f207xx.h919 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1028 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1029 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
1030 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
1031 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f217xx.h965 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1076 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1077 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
1078 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
1079 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h816 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
920 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
921 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
922 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
923 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f415xx.h884 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
991 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
992 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
993 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
994 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f407xx.h912 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1022 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1023 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
1024 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
1025 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f417xx.h980 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1093 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1094 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
1095 #define FSMC_Bank2_3_R_BASE (FSMC_R_BASE + 0x0060UL)
1096 #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0UL)
Dstm32f423xx.h952 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1086 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1087 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
Dstm32f412zx.h840 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
947 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
948 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
Dstm32f412rx.h840 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
944 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
945 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
Dstm32f412vx.h840 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
945 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
946 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
Dstm32f413xx.h918 #define FSMC_R_BASE 0xA0000000UL /*!< FSMC registers base address … macro
1051 #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000UL)
1052 #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104UL)
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l151xd.h676 #define FSMC_R_BASE (0xA0000000UL) /*!< FSMC registers base address */ macro
766 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x0000UL) /*!< FSMC Bank1 registers base address */
767 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x0104UL) /*!< FSMC Bank1E registers base address */
Dstm32l152xd.h691 #define FSMC_R_BASE (0xA0000000UL) /*!< FSMC registers base address */ macro
782 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x0000UL) /*!< FSMC Bank1 registers base address */
783 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x0104UL) /*!< FSMC Bank1E registers base address */
Dstm32l162xd.h712 #define FSMC_R_BASE (0xA0000000UL) /*!< FSMC registers base address */ macro
804 #define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x0000UL) /*!< FSMC Bank1 registers base address */
805 #define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x0104UL) /*!< FSMC Bank1E registers base address */