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Searched refs:ENABLE (Results 1 – 25 of 276) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c1545 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1555 if (ptpconfig->TimestampUpdateMode == ENABLE) in HAL_ETH_PTP_SetConfig()
1593 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1595 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1598 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1600 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1602 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1606 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h7xx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
Dstm32h7xx_hal_adc.c441 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
448 …ssert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == EN… in HAL_ADC_Init()
623 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
692 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_Init()
2835 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_ConfigChannel()
2855 …rt_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); in HAL_ADC_ConfigChannel()
2949 …ion(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSaturation == ENABLE) ? LL_ADC_OFFSET_S… in HAL_ADC_ConfigChannel()
2956 …dc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_S… in HAL_ADC_ConfigChannel()
2960 …ift(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetRightShift == ENABLE) ? LL_ADC_OFFSET_R… in HAL_ADC_ConfigChannel()
3158 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_AnalogWDGConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c1545 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1555 if (ptpconfig->TimestampUpdateMode == ENABLE) in HAL_ETH_PTP_SetConfig()
1593 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1595 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1598 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1600 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1602 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1606 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h5xx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c1533 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1575 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1577 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1580 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1582 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1584 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1586 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1588 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1590 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1592 … ETH_MACTSCR_TSMSTRENA) >> ETH_MACTSCR_TSMSTRENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h7rsxx_hal_mdf.c305 if (hmdf->Init.CommonParam.OutputClock.Activation == ENABLE) in HAL_MDF_Init()
313 if (hmdf->Init.CommonParam.OutputClock.Trigger.Activation == ENABLE) in HAL_MDF_Init()
328 if ((status == HAL_OK) && (hmdf->Init.SerialInterface.Activation == ENABLE)) in HAL_MDF_Init()
740 if ((pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart()
960 if ((pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_IT()
995 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_IT()
1004 if (pFilterConfig->SoundActivity.Activation == ENABLE) in HAL_MDF_AcqStart_IT()
1008 hmdf->Instance->DFLTIER |= (pFilterConfig->SoundActivity.SoundLevelInterrupt == ENABLE) ? in HAL_MDF_AcqStart_IT()
1098 if ((pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_DMA()
1128 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_DMA()
[all …]
Dstm32h7rsxx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
Dstm32h7rsxx_hal_gfxmmu.c219 if (hgfxmmu->Init.AddressTranslation == ENABLE) in HAL_GFXMMU_Init()
223 if (hgfxmmu->Init.Interrupts.Activation == ENABLE) in HAL_GFXMMU_Init()
727 if (pPacking->Buffer0Activation == ENABLE) in HAL_GFXMMU_ConfigPacking()
731 if (pPacking->Buffer1Activation == ENABLE) in HAL_GFXMMU_ConfigPacking()
735 if (pPacking->Buffer2Activation == ENABLE) in HAL_GFXMMU_ConfigPacking()
739 if (pPacking->Buffer3Activation == ENABLE) in HAL_GFXMMU_ConfigPacking()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_eth.c1572 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1614 … ETH_PTPTSCR_TSFCU) >> ETH_PTPTSCR_TSFCU_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1616 … ETH_PTPTSCR_TSSARFE) >> ETH_PTPTSCR_TSSARFE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1619 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1621 … ETH_PTPTSCR_TSPTPPSV2E) >> ETH_PTPTSCR_TSPTPPSV2E_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1624 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1626 … ETH_PTPTSCR_TSSIPV6FE) >> ETH_PTPTSCR_TSSIPV6FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1628 … ETH_PTPTSCR_TSSIPV4FE) >> ETH_PTPTSCR_TSSIPV4FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1630 … ETH_PTPTSCR_TSSEME) >> ETH_PTPTSCR_TSSEME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1632 … ETH_PTPTSCR_TSSMRME) >> ETH_PTPTSCR_TSSMRME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_eth.c1572 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1614 … ETH_PTPTSCR_TSFCU) >> ETH_PTPTSCR_TSFCU_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1616 … ETH_PTPTSCR_TSSARFE) >> ETH_PTPTSCR_TSSARFE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1619 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1621 … ETH_PTPTSCR_TSPTPPSV2E) >> ETH_PTPTSCR_TSPTPPSV2E_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1624 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1626 … ETH_PTPTSCR_TSSIPV6FE) >> ETH_PTPTSCR_TSSIPV6FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1628 … ETH_PTPTSCR_TSSIPV4FE) >> ETH_PTPTSCR_TSSIPV4FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1630 … ETH_PTPTSCR_TSSEME) >> ETH_PTPTSCR_TSSEME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1632 … ETH_PTPTSCR_TSSMRME) >> ETH_PTPTSCR_TSSMRME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c1594 if (ptpconfig->TimestampAddendUpdate == ENABLE) in HAL_ETH_PTP_SetConfig()
1635 ETH_MACTSCR_AV8021ASMEN_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1637 ETH_MACTSCR_TSENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1639 ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1641 ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1643 ETH_MACTSCR_TSCTRLSSR_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1645 ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1647 ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1649 ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1651 ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32n6xx_hal_eth_ex.c467 … ETH_MACVTCR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
469 …VLANTag = ((READ_BIT(heth->Instance->MACVTCR, ETH_MACVTCR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
471 … ETH_MACVTCR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
473 … ETH_MACVTCR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
475 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
480 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
482 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
484 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
488 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
566 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
[all …]
Dstm32n6xx_hal_mdf.c377 if (hmdf->Init.CommonParam.OutputClock.Activation == ENABLE) in HAL_MDF_Init()
385 if (hmdf->Init.CommonParam.OutputClock.Trigger.Activation == ENABLE) in HAL_MDF_Init()
408 if ((status == HAL_OK) && (hmdf->Init.SerialInterface.Activation == ENABLE)) in HAL_MDF_Init()
936 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart()
1313 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_IT()
1371 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_IT()
1380 … if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE)) in HAL_MDF_AcqStart_IT()
1384 hmdf->Instance->DFLTIER |= (pFilterConfig->SoundActivity.SoundLevelInterrupt == ENABLE) ? in HAL_MDF_AcqStart_IT()
1495 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_DMA()
1544 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_DMA()
[all …]
Dstm32n6xx_hal_adc.c437 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
444 …ssert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == EN… in HAL_ADC_Init()
528 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
571 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_Init()
2748 …rt_param(!((pConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); in HAL_ADC_ConfigChannel()
2812 …assert_param(!((pConfig->OffsetSignedSaturation == ENABLE) && (pConfig->OffsetSaturation == ENABLE… in HAL_ADC_ConfigChannel()
2819 (pConfig->OffsetSignedSaturation == ENABLE) \ in HAL_ADC_ConfigChannel()
2824 (pConfig->OffsetSaturation == ENABLE) \ in HAL_ADC_ConfigChannel()
2980 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_AnalogWDGConfig()
3087 if (pAnalogWDGConfig->ITMode == ENABLE) in HAL_ADC_AnalogWDGConfig()
[all …]
Dstm32n6xx_hal_adc_ex.c1789 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
1800 …assert_param(!((pConfigInjected->InjectedDiscontinuousConvMode == ENABLE) … in HAL_ADCEx_InjectedConfigChannel()
1801 && (pConfigInjected->AutoInjectedConv == ENABLE))); in HAL_ADCEx_InjectedConfigChannel()
1804 …ert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (pConfigInjected->AutoInjectedConv == … in HAL_ADCEx_InjectedConfigChannel()
1929 if (pConfigInjected->AutoInjectedConv == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
1942 if (pConfigInjected->AutoInjectedConv == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
1955 if (pConfigInjected->InjecOversamplingMode == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
2004 assert_param(!((pConfigInjected->InjectedOffsetSignedSaturation == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
2005 && (pConfigInjected->InjectedOffsetSaturation == ENABLE))); in HAL_ADCEx_InjectedConfigChannel()
2011 (pConfigInjected->InjectedOffsetSignedSaturation == ENABLE) in HAL_ADCEx_InjectedConfigChannel()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/
Dstm32h7xx_hal_eth.c1906 …macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC)>> 4) > 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
1908 …etryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1909 …eDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1910 …macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
1911 …foreTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1912 …macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
1915 …macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
1916 macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >>17) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1917 …macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >>19) == 0U) ? ENABLE : DISABL… in HAL_ETH_GetMACConfig()
1918 …aticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
[all …]
Dstm32h7xx_hal_eth_ex.c327 …InStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
329 …erVLANTag = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
330 …Processing = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
331 …hTableMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
332 …gInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
335 …nverceMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
401 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
402 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
407 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
408 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_mdf.c381 if (hmdf->Init.CommonParam.OutputClock.Activation == ENABLE) in HAL_MDF_Init()
389 if (hmdf->Init.CommonParam.OutputClock.Trigger.Activation == ENABLE) in HAL_MDF_Init()
412 if ((status == HAL_OK) && (hmdf->Init.SerialInterface.Activation == ENABLE)) in HAL_MDF_Init()
940 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart()
1317 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_IT()
1375 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_IT()
1384 … if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE)) in HAL_MDF_AcqStart_IT()
1388 hmdf->Instance->DFLTIER |= (pFilterConfig->SoundActivity.SoundLevelInterrupt == ENABLE) ? in HAL_MDF_AcqStart_IT()
1499 if ((IS_ADF_INSTANCE(hmdf->Instance)) && (pFilterConfig->SoundActivity.Activation == ENABLE) && in HAL_MDF_AcqStart_DMA()
1548 if (pFilterConfig->ReshapeFilter.Activation == ENABLE) in HAL_MDF_AcqStart_DMA()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_sdmmc.h734 #define __SDIO_ENABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
748 #define __SDIO_DMA_ENABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
926 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
940 #define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
954 #define __SDIO_OPERATION_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
968 #define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
981 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
1005 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_sdmmc.h734 #define __SDIO_ENABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
748 #define __SDIO_DMA_ENABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
926 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
940 #define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
954 #define __SDIO_OPERATION_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
968 #define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
981 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
1005 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_sdmmc.h742 #define __SDIO_ENABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
756 #define __SDIO_DMA_ENABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
934 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
948 #define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
962 #define __SDIO_OPERATION_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
976 #define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
990 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
1014 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_sdmmc.h730 #define __SDIO_ENABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
744 #define __SDIO_DMA_ENABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
922 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
936 #define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
950 #define __SDIO_OPERATION_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
964 #define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
977 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
1001 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_adc.c427 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
434 …ssert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == EN… in HAL_ADC_Init()
569 if (hadc->Init.DiscontinuousConvMode == ENABLE) in HAL_ADC_Init()
607 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_Init()
2702 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_ConfigChannel()
2713 …rt_param(!((pConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); in HAL_ADC_ConfigChannel()
2775 …dc->Instance, pConfig->OffsetNumber, (pConfig->OffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_S… in HAL_ADC_ConfigChannel()
2779 …ift(hadc->Instance, pConfig->OffsetNumber, (pConfig->OffsetRightShift == ENABLE) ? LL_ADC_OFFSET_R… in HAL_ADC_ConfigChannel()
2956 if (hadc->Init.OversamplingMode == ENABLE) in HAL_ADC_AnalogWDGConfig()
3044 if (pAnalogWDGConfig->ITMode == ENABLE) in HAL_ADC_AnalogWDGConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_pwr_ex.c81 *(__IO uint32_t *) CR_FWU_BB = (uint32_t)ENABLE; in HAL_PWREx_EnableFastWakeUp()
101 *(__IO uint32_t *) CR_ULP_BB = (uint32_t)ENABLE; in HAL_PWREx_EnableUltraLowPower()
127 *(__IO uint32_t *) CR_LPSDSR_BB = (uint32_t)ENABLE; in HAL_PWREx_EnableLowPowerRunMode()
128 *(__IO uint32_t *) CR_LPRUN_BB = (uint32_t)ENABLE; in HAL_PWREx_EnableLowPowerRunMode()

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