1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_eth_ex.c
4 * @author MCD Application Team
5 * @brief ETH HAL Extended module driver.
6 *
7 ******************************************************************************
8 * @attention
9 *
10 * Copyright (c) 2017 STMicroelectronics.
11 * All rights reserved.
12 *
13 * This software is licensed under terms that can be found in the LICENSE file
14 * in the root directory of this software component.
15 * If no LICENSE file comes with this software, it is provided AS-IS.
16 *
17 ******************************************************************************
18 */
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32h7xx_hal.h"
22
23 /** @addtogroup STM32H7xx_HAL_Driver
24 * @{
25 */
26
27 #ifdef HAL_ETH_LEGACY_MODULE_ENABLED
28
29 #if defined(ETH)
30
31 /** @defgroup ETHEx ETHEx
32 * @brief ETH HAL Extended module driver
33 * @{
34 */
35
36
37 /* Private typedef -----------------------------------------------------------*/
38 /* Private define ------------------------------------------------------------*/
39 /** @defgroup ETHEx_Private_Constants ETHEx Private Constants
40 * @{
41 */
42 #define ETH_MACL4CR_MASK (ETH_MACL3L4CR_L4PEN | ETH_MACL3L4CR_L4SPM | \
43 ETH_MACL3L4CR_L4SPIM | ETH_MACL3L4CR_L4DPM | \
44 ETH_MACL3L4CR_L4DPIM)
45
46 #define ETH_MACL3CR_MASK (ETH_MACL3L4CR_L3PEN | ETH_MACL3L4CR_L3SAM | \
47 ETH_MACL3L4CR_L3SAIM | ETH_MACL3L4CR_L3DAM | \
48 ETH_MACL3L4CR_L3DAIM | ETH_MACL3L4CR_L3HSBM | \
49 ETH_MACL3L4CR_L3HDBM)
50
51 #define ETH_MACRXVLAN_MASK (ETH_MACVTR_EIVLRXS | ETH_MACVTR_EIVLS | \
52 ETH_MACVTR_ERIVLT | ETH_MACVTR_EDVLP | \
53 ETH_MACVTR_VTHM | ETH_MACVTR_EVLRXS | \
54 ETH_MACVTR_EVLS | ETH_MACVTR_DOVLTC | \
55 ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL | \
56 ETH_MACVTR_VTIM | ETH_MACVTR_ETV)
57
58 #define ETH_MACTXVLAN_MASK (ETH_MACVIR_VLTI | ETH_MACVIR_CSVL | \
59 ETH_MACVIR_VLP | ETH_MACVIR_VLC)
60 /**
61 * @}
62 */
63
64 /* Private macros ------------------------------------------------------------*/
65 /* Private function prototypes -----------------------------------------------*/
66 /* Exported functions ---------------------------------------------------------*/
67 /** @defgroup ETHEx_Exported_Functions ETH Extended Exported Functions
68 * @{
69 */
70
71 /** @defgroup ETHEx_Exported_Functions_Group1 Extended features functions
72 * @brief Extended features functions
73 *
74 @verbatim
75 ===============================================================================
76 ##### Extended features functions #####
77 ===============================================================================
78 [..] This section provides functions allowing to:
79 (+) Configure ARP offload module
80 (+) Configure L3 and L4 filters
81 (+) Configure Extended VLAN features
82 (+) Configure Energy Efficient Ethernet module
83
84 @endverbatim
85 * @{
86 */
87
88 /**
89 * @brief Enables ARP Offload.
90 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
91 * the configuration information for ETHERNET module
92 * @retval None
93 */
HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef * heth)94 void HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef *heth)
95 {
96 SET_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
97 }
98
99 /**
100 * @brief Disables ARP Offload.
101 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
102 * the configuration information for ETHERNET module
103 * @retval None
104 */
HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef * heth)105 void HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef *heth)
106 {
107 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
108 }
109
110 /**
111 * @brief Set the ARP Match IP address
112 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
113 * the configuration information for ETHERNET module
114 * @param IpAddress: IP Address to be matched for incoming ARP requests
115 * @retval None
116 */
HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef * heth,uint32_t IpAddress)117 void HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef *heth, uint32_t IpAddress)
118 {
119 WRITE_REG(heth->Instance->MACARPAR, IpAddress);
120 }
121
122 /**
123 * @brief Configures the L4 Filter, this function allow to:
124 * set the layer 4 protocol to be matched (TCP or UDP)
125 * enable/disable L4 source/destination port perfect/inverse match.
126 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
127 * the configuration information for ETHERNET module
128 * @param Filter: L4 filter to configured, this parameter must be one of the following
129 * ETH_L4_FILTER_0
130 * ETH_L4_FILTER_1
131 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
132 * that contains L4 filter configuration.
133 * @retval HAL status
134 */
HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L4FilterConfigTypeDef * pL4FilterConfig)135 HAL_StatusTypeDef HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter , ETH_L4FilterConfigTypeDef *pL4FilterConfig)
136 {
137 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
138
139 if(pL4FilterConfig == NULL)
140 {
141 return HAL_ERROR;
142 }
143
144 /* Write configuration to (MACL3L4C0R + filter )register */
145 MODIFY_REG(*configreg, ETH_MACL4CR_MASK ,(pL4FilterConfig->Protocol |
146 pL4FilterConfig->SrcPortFilterMatch |
147 pL4FilterConfig->DestPortFilterMatch));
148
149 configreg = ((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter));
150
151 /* Write configuration to (MACL4A0R + filter )register */
152 MODIFY_REG(*configreg, (ETH_MACL4AR_L4DP | ETH_MACL4AR_L4SP) , (pL4FilterConfig->SourcePort |
153 (pL4FilterConfig->DestinationPort << 16)));
154
155 /* Enable L4 filter */
156 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
157
158 return HAL_OK;
159 }
160
161 /**
162 * @brief Configures the L4 Filter, this function allow to:
163 * set the layer 4 protocol to be matched (TCP or UDP)
164 * enable/disable L4 source/destination port perfect/inverse match.
165 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
166 * the configuration information for ETHERNET module
167 * @param Filter: L4 filter to configured, this parameter must be one of the following
168 * ETH_L4_FILTER_0
169 * ETH_L4_FILTER_1
170 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
171 * that contains L4 filter configuration.
172 * @retval HAL status
173 */
HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L4FilterConfigTypeDef * pL4FilterConfig)174 HAL_StatusTypeDef HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L4FilterConfigTypeDef *pL4FilterConfig)
175 {
176 if(pL4FilterConfig == NULL)
177 {
178 return HAL_ERROR;
179 }
180
181 /* Get configuration to (MACL3L4C0R + filter )register */
182 pL4FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L4PEN);
183 pL4FilterConfig->DestPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4DPM | ETH_MACL3L4CR_L4DPIM));
184 pL4FilterConfig->SrcPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4SPM | ETH_MACL3L4CR_L4SPIM));
185
186 /* Get configuration to (MACL3L4C0R + filter )register */
187 pL4FilterConfig->DestinationPort = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4DP) >> 16);
188 pL4FilterConfig->SourcePort = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4SP);
189
190 return HAL_OK;
191 }
192
193 /**
194 * @brief Configures the L3 Filter, this function allow to:
195 * set the layer 3 protocol to be matched (IPv4 or IPv6)
196 * enable/disable L3 source/destination port perfect/inverse match.
197 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
198 * the configuration information for ETHERNET module
199 * @param Filter: L3 filter to configured, this parameter must be one of the following
200 * ETH_L3_FILTER_0
201 * ETH_L3_FILTER_1
202 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
203 * that contains L3 filter configuration.
204 * @retval HAL status
205 */
HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L3FilterConfigTypeDef * pL3FilterConfig)206 HAL_StatusTypeDef HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig)
207 {
208 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
209
210 if(pL3FilterConfig == NULL)
211 {
212 return HAL_ERROR;
213 }
214
215 /* Write configuration to (MACL3L4C0R + filter )register */
216 MODIFY_REG(*configreg, ETH_MACL3CR_MASK, (pL3FilterConfig->Protocol |
217 pL3FilterConfig->SrcAddrFilterMatch |
218 pL3FilterConfig->DestAddrFilterMatch |
219 (pL3FilterConfig->SrcAddrHigherBitsMatch << 6) |
220 (pL3FilterConfig->DestAddrHigherBitsMatch << 11)));
221
222 /* Check if IPv6 protocol is selected */
223 if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
224 {
225 /* Set the IPv6 address match */
226 /* Set Bits[31:0] of 128-bit IP addr */
227 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip6Addr[0];
228 /* Set Bits[63:32] of 128-bit IP addr */
229 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip6Addr[1];
230 /* update Bits[95:64] of 128-bit IP addr */
231 *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter)) = pL3FilterConfig->Ip6Addr[2];
232 /* update Bits[127:96] of 128-bit IP addr */
233 *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter)) = pL3FilterConfig->Ip6Addr[3];
234 }
235 else /* IPv4 protocol is selected */
236 {
237 /* Set the IPv4 source address match */
238 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip4SrcAddr;
239 /* Set the IPv4 destination address match */
240 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip4DestAddr;
241 }
242
243 return HAL_OK;
244 }
245
246 /**
247 * @brief Configures the L3 Filter, this function allow to:
248 * set the layer 3 protocol to be matched (IPv4 or IPv6)
249 * enable/disable L3 source/destination port perfect/inverse match.
250 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
251 * the configuration information for ETHERNET module
252 * @param Filter: L3 filter to configured, this parameter must be one of the following
253 * ETH_L3_FILTER_0
254 * ETH_L3_FILTER_1
255 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
256 * that will contain the L3 filter configuration.
257 * @retval HAL status
258 */
HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L3FilterConfigTypeDef * pL3FilterConfig)259 HAL_StatusTypeDef HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig)
260 {
261 if(pL3FilterConfig == NULL)
262 {
263 return HAL_ERROR;
264 }
265
266 pL3FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3PEN);
267 pL3FilterConfig->SrcAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3SAM | ETH_MACL3L4CR_L3SAIM));
268 pL3FilterConfig->DestAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3DAM | ETH_MACL3L4CR_L3DAIM));
269 pL3FilterConfig->SrcAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HSBM) >> 6);
270 pL3FilterConfig->DestAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HDBM) >> 11);
271
272 if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
273 {
274 pL3FilterConfig->Ip6Addr[0] = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
275 pL3FilterConfig->Ip6Addr[1] = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
276 pL3FilterConfig->Ip6Addr[2] = *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter));
277 pL3FilterConfig->Ip6Addr[3] = *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter));
278 }
279 else
280 {
281 pL3FilterConfig->Ip4SrcAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
282 pL3FilterConfig->Ip4DestAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
283 }
284
285 return HAL_OK;
286 }
287
288 /**
289 * @brief Enables L3 and L4 filtering process.
290 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
291 * the configuration information for ETHERNET module
292 * @retval None.
293 */
HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef * heth)294 void HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef *heth)
295 {
296 /* Enable L3/L4 filter */
297 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
298 }
299
300 /**
301 * @brief Disables L3 and L4 filtering process.
302 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
303 * the configuration information for ETHERNET module
304 * @retval None.
305 */
HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef * heth)306 void HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef *heth)
307 {
308 /* Disable L3/L4 filter */
309 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
310 }
311
312 /**
313 * @brief Get the VLAN Configuration for Receive Packets.
314 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
315 * the configuration information for ETHERNET module
316 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
317 * that will contain the VLAN filter configuration.
318 * @retval HAL status
319 */
HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef * heth,ETH_RxVLANConfigTypeDef * pVlanConfig)320 HAL_StatusTypeDef HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
321 {
322 if(pVlanConfig == NULL)
323 {
324 return HAL_ERROR;
325 }
326
327 pVlanConfig->InnerVLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE;
328 pVlanConfig->StripInnerVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLS);
329 pVlanConfig->InnerVLANTag = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE;
330 pVlanConfig->DoubleVLANProcessing = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE;
331 pVlanConfig->VLANTagHashTableMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE;
332 pVlanConfig->VLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE;
333 pVlanConfig->StripVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLS);
334 pVlanConfig->VLANTypeCheck = READ_BIT(heth->Instance->MACVTR, (ETH_MACVTR_DOVLTC | ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL));
335 pVlanConfig->VLANTagInverceMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17) == 0U) ? DISABLE : ENABLE;
336
337 return HAL_OK;
338 }
339
340 /**
341 * @brief Set the VLAN Configuration for Receive Packets.
342 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
343 * the configuration information for ETHERNET module
344 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
345 * that contains VLAN filter configuration.
346 * @retval HAL status
347 */
HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef * heth,ETH_RxVLANConfigTypeDef * pVlanConfig)348 HAL_StatusTypeDef HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
349 {
350 if(pVlanConfig == NULL)
351 {
352 return HAL_ERROR;
353 }
354
355 /* Write config to MACVTR */
356 MODIFY_REG(heth->Instance->MACVTR, ETH_MACRXVLAN_MASK, (((uint32_t)pVlanConfig->InnerVLANTagInStatus << 31) |
357 pVlanConfig->StripInnerVLANTag |
358 ((uint32_t)pVlanConfig->InnerVLANTag << 27) |
359 ((uint32_t)pVlanConfig->DoubleVLANProcessing << 26) |
360 ((uint32_t)pVlanConfig->VLANTagHashTableMatch << 25) |
361 ((uint32_t)pVlanConfig->VLANTagInStatus << 24) |
362 pVlanConfig->StripVLANTag |
363 pVlanConfig->VLANTypeCheck |
364 ((uint32_t)pVlanConfig->VLANTagInverceMatch << 17)));
365
366 return HAL_OK;
367 }
368
369 /**
370 * @brief Set the VLAN Hash Table
371 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
372 * the configuration information for ETHERNET module
373 * @param VLANHashTable: VLAN hash table 16 bit value
374 * @retval None
375 */
HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef * heth,uint32_t VLANHashTable)376 void HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef *heth, uint32_t VLANHashTable)
377 {
378 MODIFY_REG(heth->Instance->MACVHTR, ETH_MACVHTR_VLHT, VLANHashTable);
379 }
380
381 /**
382 * @brief Get the VLAN Configuration for Transmit Packets.
383 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
384 * the configuration information for ETHERNET module
385 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
386 * ETH_OUTER_TX_VLANTAG
387 * ETH_INNER_TX_VLANTAG
388 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
389 * that will contain the Tx VLAN filter configuration.
390 * @retval HAL Status.
391 */
HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef * heth,uint32_t VLANTag,ETH_TxVLANConfigTypeDef * pVlanConfig)392 HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig)
393 {
394 if (pVlanConfig == NULL)
395 {
396 return HAL_ERROR;
397 }
398
399 if(VLANTag == ETH_INNER_TX_VLANTAG)
400 {
401 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE;
402 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE;
403 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACIVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
404 }
405 else
406 {
407 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE;
408 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE;
409 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
410 }
411
412 return HAL_OK;;
413 }
414
415 /**
416 * @brief Set the VLAN Configuration for Transmit Packets.
417 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
418 * the configuration information for ETHERNET module
419 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
420 * ETH_OUTER_TX_VLANTAG
421 * ETH_INNER_TX_VLANTAG
422 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
423 * that contains Tx VLAN filter configuration.
424 * @retval HAL Status
425 */
HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef * heth,uint32_t VLANTag,ETH_TxVLANConfigTypeDef * pVlanConfig)426 HAL_StatusTypeDef HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig)
427 {
428 if(VLANTag == ETH_INNER_TX_VLANTAG)
429 {
430 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) |
431 ((uint32_t)pVlanConfig->SVLANType << 19) |
432 pVlanConfig->VLANTagControl));
433 /* Enable Double VLAN processing */
434 SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
435 }
436 else
437 {
438 MODIFY_REG(heth->Instance->MACVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) |
439 ((uint32_t)pVlanConfig->SVLANType << 19) |
440 pVlanConfig->VLANTagControl));
441 }
442
443 return HAL_OK;
444 }
445
446 /**
447 * @brief Set the VLAN Tag Identifier for Transmit Packets.
448 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
449 * the configuration information for ETHERNET module
450 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
451 * ETH_OUTER_TX_VLANTAG
452 * ETH_INNER_TX_VLANTAG
453 * @param VLANIdentifier: VLAN Identifier 16 bit value
454 * @retval None
455 */
HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef * heth,uint32_t VLANTag,uint32_t VLANIdentifier)456 void HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t VLANTag ,uint32_t VLANIdentifier)
457 {
458 if(VLANTag == ETH_INNER_TX_VLANTAG)
459 {
460 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACVIR_VLT, VLANIdentifier);
461 }
462 else
463 {
464 MODIFY_REG(heth->Instance->MACVIR, ETH_MACVIR_VLT, VLANIdentifier);
465 }
466 }
467
468 /**
469 * @brief Enables the VLAN Tag Filtering process.
470 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
471 * the configuration information for ETHERNET module
472 * @retval None.
473 */
HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef * heth)474 void HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef *heth)
475 {
476 /* Enable VLAN processing */
477 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
478 }
479
480 /**
481 * @brief Disables the VLAN Tag Filtering process.
482 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
483 * the configuration information for ETHERNET module
484 * @retval None.
485 */
HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef * heth)486 void HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef *heth)
487 {
488 /* Disable VLAN processing */
489 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
490 }
491
492 /**
493 * @brief Enters the Low Power Idle (LPI) mode
494 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
495 * the configuration information for ETHERNET module
496 * @param TxAutomate: Enable/Disable automate enter/exit LPI mode.
497 * @param TxClockStop: Enable/Disable Tx clock stop in LPI mode.
498 * @retval None
499 */
HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef * heth,FunctionalState TxAutomate,FunctionalState TxClockStop)500 void HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef *heth, FunctionalState TxAutomate, FunctionalState TxClockStop)
501 {
502 /* Enable LPI Interrupts */
503 __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_LPIIE);
504
505 /* Write to LPI Control register: Enter low power mode */
506 MODIFY_REG(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE), (((uint32_t)TxAutomate << 19) |
507 ((uint32_t)TxClockStop << 21) |
508 ETH_MACLCSR_LPIEN));
509 }
510
511 /**
512 * @brief Exits the Low Power Idle (LPI) mode.
513 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
514 * the configuration information for ETHERNET module
515 * @retval None
516 */
HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef * heth)517 void HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef *heth)
518 {
519 /* Clear the LPI Config and exit low power mode */
520 CLEAR_BIT(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE));
521
522 /* Enable LPI Interrupts */
523 __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_LPIIE);
524 }
525
526
527 /**
528 * @brief Returns the ETH MAC LPI event
529 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
530 * the configuration information for ETHERNET module
531 * @retval ETH MAC WakeUp event
532 */
HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef * heth)533 uint32_t HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef *heth)
534 {
535 return heth->MACLPIEvent;
536 }
537
538 /**
539 * @}
540 */
541
542 /**
543 * @}
544 */
545
546 /**
547 * @}
548 */
549
550 #endif /* ETH */
551
552 #endif /* HAL_ETH_LEGACY_MODULE_ENABLED*/
553
554 /**
555 * @}
556 */
557
