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Searched refs:DSI_GPDR_DATA4_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f469xx.h7618 #define DSI_GPDR_DATA4_Pos (24U) macro
7619 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
7621 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
7622 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
7623 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
7624 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
7625 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
7626 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
7627 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
7628 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32f479xx.h7808 #define DSI_GPDR_DATA4_Pos (24U) macro
7809 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
7811 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
7812 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
7813 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
7814 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
7815 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
7816 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
7817 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
7818 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f779xx.h19607 #define DSI_GPDR_DATA4_Pos (24U) macro
19608 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
19610 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
19611 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
19612 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
19613 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
19614 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
19615 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
19616 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
19617 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32f769xx.h19314 #define DSI_GPDR_DATA4_Pos (24U) macro
19315 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
19317 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
19318 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
19319 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
19320 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
19321 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
19322 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
19323 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
19324 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r9xx.h8982 #define DSI_GPDR_DATA4_Pos (24U) macro
8983 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
8985 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
8986 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
8987 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
8988 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
8989 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
8990 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
8991 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
8992 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32l4s9xx.h9234 #define DSI_GPDR_DATA4_Pos (24U) macro
9235 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
9237 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
9238 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
9239 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
9240 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
9241 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
9242 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
9243 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
9244 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h757xx.h10809 #define DSI_GPDR_DATA4_Pos (24U) macro
10810 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
10812 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
10813 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
10814 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
10815 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
10816 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
10817 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
10818 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
10819 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32h747xg.h10616 #define DSI_GPDR_DATA4_Pos (24U) macro
10617 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
10619 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
10620 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
10621 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
10622 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
10623 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
10624 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
10625 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
10626 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32h747xx.h10616 #define DSI_GPDR_DATA4_Pos (24U) macro
10617 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
10619 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
10620 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
10621 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
10622 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
10623 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
10624 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
10625 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
10626 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u599xx.h8209 #define DSI_GPDR_DATA4_Pos (24U) macro
8210 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
8212 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
8213 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
8214 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
8215 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
8216 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
8217 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
8218 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
8219 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32u5f9xx.h8342 #define DSI_GPDR_DATA4_Pos (24U) macro
8343 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
8345 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
8346 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
8347 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
8348 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
8349 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
8350 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
8351 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
8352 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32u5a9xx.h8658 #define DSI_GPDR_DATA4_Pos (24U) macro
8659 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
8661 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
8662 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
8663 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
8664 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
8665 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
8666 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
8667 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
8668 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */
Dstm32u5g9xx.h8791 #define DSI_GPDR_DATA4_Pos (24U) macro
8792 #define DSI_GPDR_DATA4_Msk (0xFFUL << DSI_GPDR_DATA4_Pos) /*!< 0xFF000000 */
8794 #define DSI_GPDR_DATA4_0 (0x01UL << DSI_GPDR_DATA4_Pos) /*!< 0x01000000 */
8795 #define DSI_GPDR_DATA4_1 (0x02UL << DSI_GPDR_DATA4_Pos) /*!< 0x02000000 */
8796 #define DSI_GPDR_DATA4_2 (0x04UL << DSI_GPDR_DATA4_Pos) /*!< 0x04000000 */
8797 #define DSI_GPDR_DATA4_3 (0x08UL << DSI_GPDR_DATA4_Pos) /*!< 0x08000000 */
8798 #define DSI_GPDR_DATA4_4 (0x10UL << DSI_GPDR_DATA4_Pos) /*!< 0x10000000 */
8799 #define DSI_GPDR_DATA4_5 (0x20UL << DSI_GPDR_DATA4_Pos) /*!< 0x20000000 */
8800 #define DSI_GPDR_DATA4_6 (0x40UL << DSI_GPDR_DATA4_Pos) /*!< 0x40000000 */
8801 #define DSI_GPDR_DATA4_7 (0x80UL << DSI_GPDR_DATA4_Pos) /*!< 0x80000000 */