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Searched refs:DSI_GPDR_DATA1_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f469xx.h7582 #define DSI_GPDR_DATA1_Pos (0U) macro
7583 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
7585 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
7586 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
7587 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
7588 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
7589 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
7590 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
7591 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
7592 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32f479xx.h7772 #define DSI_GPDR_DATA1_Pos (0U) macro
7773 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
7775 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
7776 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
7777 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
7778 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
7779 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
7780 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
7781 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
7782 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f779xx.h19571 #define DSI_GPDR_DATA1_Pos (0U) macro
19572 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
19574 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
19575 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
19576 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
19577 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
19578 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
19579 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
19580 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
19581 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32f769xx.h19278 #define DSI_GPDR_DATA1_Pos (0U) macro
19279 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
19281 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
19282 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
19283 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
19284 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
19285 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
19286 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
19287 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
19288 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r9xx.h8946 #define DSI_GPDR_DATA1_Pos (0U) macro
8947 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
8949 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
8950 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
8951 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
8952 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
8953 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
8954 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
8955 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
8956 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32l4s9xx.h9198 #define DSI_GPDR_DATA1_Pos (0U) macro
9199 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
9201 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
9202 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
9203 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
9204 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
9205 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
9206 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
9207 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
9208 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h757xx.h10773 #define DSI_GPDR_DATA1_Pos (0U) macro
10774 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
10776 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
10777 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
10778 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
10779 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
10780 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
10781 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
10782 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
10783 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32h747xg.h10580 #define DSI_GPDR_DATA1_Pos (0U) macro
10581 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
10583 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
10584 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
10585 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
10586 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
10587 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
10588 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
10589 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
10590 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32h747xx.h10580 #define DSI_GPDR_DATA1_Pos (0U) macro
10581 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
10583 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
10584 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
10585 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
10586 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
10587 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
10588 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
10589 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
10590 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u599xx.h8173 #define DSI_GPDR_DATA1_Pos (0U) macro
8174 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
8176 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
8177 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
8178 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
8179 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
8180 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
8181 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
8182 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
8183 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32u5f9xx.h8306 #define DSI_GPDR_DATA1_Pos (0U) macro
8307 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
8309 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
8310 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
8311 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
8312 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
8313 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
8314 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
8315 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
8316 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32u5a9xx.h8622 #define DSI_GPDR_DATA1_Pos (0U) macro
8623 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
8625 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
8626 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
8627 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
8628 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
8629 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
8630 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
8631 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
8632 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */
Dstm32u5g9xx.h8755 #define DSI_GPDR_DATA1_Pos (0U) macro
8756 #define DSI_GPDR_DATA1_Msk (0xFFUL << DSI_GPDR_DATA1_Pos) /*!< 0x000000FF */
8758 #define DSI_GPDR_DATA1_0 (0x01UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000001 */
8759 #define DSI_GPDR_DATA1_1 (0x02UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000002 */
8760 #define DSI_GPDR_DATA1_2 (0x04UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000004 */
8761 #define DSI_GPDR_DATA1_3 (0x08UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000008 */
8762 #define DSI_GPDR_DATA1_4 (0x10UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000010 */
8763 #define DSI_GPDR_DATA1_5 (0x20UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000020 */
8764 #define DSI_GPDR_DATA1_6 (0x40UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000040 */
8765 #define DSI_GPDR_DATA1_7 (0x80UL << DSI_GPDR_DATA1_Pos) /*!< 0x00000080 */