Home
last modified time | relevance | path

Searched refs:DSI_CLTCR_HS2LP_TIME5_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f469xx.h8107 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
8108 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32f479xx.h8297 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
8298 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f779xx.h20096 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
20097 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32f769xx.h19803 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
19804 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r9xx.h9452 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
9453 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32l4s9xx.h9704 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
9705 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h757xx.h11298 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
11299 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32h747xg.h11105 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
11106 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32h747xx.h11105 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
11106 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u599xx.h8689 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
8690 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32u5f9xx.h8822 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
8823 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32u5a9xx.h9138 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
9139 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */
Dstm32u5g9xx.h9271 #define DSI_CLTCR_HS2LP_TIME5_Pos (21U) macro
9272 #define DSI_CLTCR_HS2LP_TIME5_Msk (0x1UL << DSI_CLTCR_HS2LP_TIME5_Pos) /*!< 0x00200000 */