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Searched refs:DMA_SECCFGR_SEC0 (Results 1 – 25 of 31) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h1471 …MODIFY_REG(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << Channel), ((Configuration & LL_DMA_CHANNEL_SEC) << … in LL_DMA_ConfigChannelSecure()
1521 #if defined (DMA_SECCFGR_SEC0)
1592 #if defined (DMA_SECCFGR_SEC0)
3487 SET_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelSecure()
3508 CLEAR_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelSecure()
3512 #if defined (DMA_SECCFGR_SEC0)
3531 return ((READ_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelSecure()
3532 == (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelSecure()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h2110 …MODIFY_REG(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << Channel), ((Configuration & LL_DMA_CHANNEL_SEC) << … in LL_DMA_ConfigChannelSecure()
2160 #if defined (DMA_SECCFGR_SEC0)
2231 #if defined (DMA_SECCFGR_SEC0)
5271 SET_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelSecure()
5292 CLEAR_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelSecure()
5296 #if defined (DMA_SECCFGR_SEC0)
5315 return ((READ_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelSecure()
5316 == (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelSecure()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h2043 …MODIFY_REG(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << Channel), ((Configuration & LL_DMA_CHANNEL_SEC) << … in LL_DMA_ConfigChannelSecure()
5548 SET_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelSecure()
5577 CLEAR_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelSecure()
5607 return ((READ_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelSecure()
5608 == (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelSecure()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h2602 …MODIFY_REG(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << Channel), ((Configuration & LL_DMA_CHANNEL_SEC) << … in LL_DMA_ConfigChannelSecure()
6685 SET_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelSecure()
6714 CLEAR_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelSecure()
6744 return ((READ_BIT(DMAx->SECCFGR, (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelSecure()
6745 == (DMA_SECCFGR_SEC0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelSecure()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c1470 #if defined (DMA_SECCFGR_SEC0) in HAL_DMA_GetConfigChannelAttributes()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c1482 #if defined (DMA_SECCFGR_SEC0) in HAL_DMA_GetConfigChannelAttributes()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h2611 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32wba54xx.h2794 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32wba5mxx.h2794 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32wba55xx.h2794 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h4988 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32h562xx.h5431 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32h533xx.h5397 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32h573xx.h7924 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32h563xx.h7515 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h5959 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u535xx.h5559 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u575xx.h5958 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u585xx.h6407 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u595xx.h6214 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u5a5xx.h6663 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u5f7xx.h6510 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u599xx.h6502 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u5g7xx.h6959 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro
Dstm32u5f9xx.h6630 #define DMA_SECCFGR_SEC0 DMA_SECCFGR_SEC0_Msk /*!< Secure Sta… macro

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