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Searched refs:DMA_CTR1_SSEC_Pos (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2276 #define DMA_CTR1_SSEC_Pos (15U) macro
2277 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32wba52xx.h2861 #define DMA_CTR1_SSEC_Pos (15U) macro
2862 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32wba54xx.h3044 #define DMA_CTR1_SSEC_Pos (15U) macro
3045 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32wba5mxx.h3044 #define DMA_CTR1_SSEC_Pos (15U) macro
3045 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32wba55xx.h3044 #define DMA_CTR1_SSEC_Pos (15U) macro
3045 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h5238 #define DMA_CTR1_SSEC_Pos (15U) macro
5239 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32h562xx.h5681 #define DMA_CTR1_SSEC_Pos (15U) macro
5682 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32h533xx.h5647 #define DMA_CTR1_SSEC_Pos (15U) macro
5648 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32h573xx.h8174 #define DMA_CTR1_SSEC_Pos (15U) macro
8175 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32h563xx.h7765 #define DMA_CTR1_SSEC_Pos (15U) macro
7766 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6329 #define DMA_CTR1_SSEC_Pos (15U) macro
6330 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u535xx.h5929 #define DMA_CTR1_SSEC_Pos (15U) macro
5930 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u575xx.h6328 #define DMA_CTR1_SSEC_Pos (15U) macro
6329 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u585xx.h6777 #define DMA_CTR1_SSEC_Pos (15U) macro
6778 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u595xx.h6584 #define DMA_CTR1_SSEC_Pos (15U) macro
6585 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5a5xx.h7033 #define DMA_CTR1_SSEC_Pos (15U) macro
7034 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5f7xx.h6880 #define DMA_CTR1_SSEC_Pos (15U) macro
6881 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u599xx.h6872 #define DMA_CTR1_SSEC_Pos (15U) macro
6873 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5g7xx.h7329 #define DMA_CTR1_SSEC_Pos (15U) macro
7330 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5f9xx.h7000 #define DMA_CTR1_SSEC_Pos (15U) macro
7001 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5a9xx.h7321 #define DMA_CTR1_SSEC_Pos (15U) macro
7322 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32u5g9xx.h7449 #define DMA_CTR1_SSEC_Pos (15U) macro
7450 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h11091 #define DMA_CTR1_SSEC_Pos (15U) macro
11092 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32n657xx.h12033 #define DMA_CTR1_SSEC_Pos (15U) macro
12034 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…
Dstm32n655xx.h11791 #define DMA_CTR1_SSEC_Pos (15U) macro
11792 #define DMA_CTR1_SSEC_Msk (0x1UL << DMA_CTR1_SSEC_Pos) /*!< 0x00008000…

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