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Searched refs:DMA_CTR1_DSEC_Pos (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2299 #define DMA_CTR1_DSEC_Pos (31U) macro
2300 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32wba52xx.h2884 #define DMA_CTR1_DSEC_Pos (31U) macro
2885 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32wba54xx.h3067 #define DMA_CTR1_DSEC_Pos (31U) macro
3068 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32wba5mxx.h3067 #define DMA_CTR1_DSEC_Pos (31U) macro
3068 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32wba55xx.h3067 #define DMA_CTR1_DSEC_Pos (31U) macro
3068 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h5261 #define DMA_CTR1_DSEC_Pos (31U) macro
5262 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32h562xx.h5704 #define DMA_CTR1_DSEC_Pos (31U) macro
5705 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32h533xx.h5670 #define DMA_CTR1_DSEC_Pos (31U) macro
5671 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32h573xx.h8197 #define DMA_CTR1_DSEC_Pos (31U) macro
8198 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32h563xx.h7788 #define DMA_CTR1_DSEC_Pos (31U) macro
7789 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6352 #define DMA_CTR1_DSEC_Pos (31U) macro
6353 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u535xx.h5952 #define DMA_CTR1_DSEC_Pos (31U) macro
5953 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u575xx.h6351 #define DMA_CTR1_DSEC_Pos (31U) macro
6352 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u585xx.h6800 #define DMA_CTR1_DSEC_Pos (31U) macro
6801 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u595xx.h6607 #define DMA_CTR1_DSEC_Pos (31U) macro
6608 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5a5xx.h7056 #define DMA_CTR1_DSEC_Pos (31U) macro
7057 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5f7xx.h6903 #define DMA_CTR1_DSEC_Pos (31U) macro
6904 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u599xx.h6895 #define DMA_CTR1_DSEC_Pos (31U) macro
6896 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5g7xx.h7352 #define DMA_CTR1_DSEC_Pos (31U) macro
7353 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5f9xx.h7023 #define DMA_CTR1_DSEC_Pos (31U) macro
7024 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5a9xx.h7344 #define DMA_CTR1_DSEC_Pos (31U) macro
7345 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32u5g9xx.h7472 #define DMA_CTR1_DSEC_Pos (31U) macro
7473 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h11117 #define DMA_CTR1_DSEC_Pos (31U) macro
11118 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32n657xx.h12059 #define DMA_CTR1_DSEC_Pos (31U) macro
12060 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…
Dstm32n655xx.h11817 #define DMA_CTR1_DSEC_Pos (31U) macro
11818 #define DMA_CTR1_DSEC_Msk (0x1UL << DMA_CTR1_DSEC_Pos) /*!< 0x80000000…

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