Home
last modified time | relevance | path

Searched refs:DMA_CLLR_UT3_Msk (Results 1 – 25 of 26) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3995 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
3996 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h523xx.h5357 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5358 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h562xx.h5800 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5801 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h533xx.h5766 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5767 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h573xx.h8293 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
8294 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h563xx.h7884 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7885 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6445 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6446 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u535xx.h6045 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6046 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u575xx.h6444 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6445 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u585xx.h6893 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6894 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u595xx.h6700 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6701 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5a5xx.h7149 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7150 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5f7xx.h6996 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6997 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u599xx.h6988 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6989 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5g7xx.h7445 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7446 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5f9xx.h7116 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7117 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5a9xx.h7437 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7438 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5g9xx.h7565 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7566 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5152 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5153 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h7s7xx.h5676 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5677 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h7s3xx.h5597 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5598 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h7r7xx.h5229 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5230 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h11213 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
11214 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32n657xx.h12155 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
12156 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32n655xx.h11913 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
11914 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…

12