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Searched refs:DMA2D_FGPFCCR_ALPHA_Pos (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_dma2d.c339 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
347 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->AlphaMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_dma2d.c341 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
351 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h974 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
985 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h1078 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1089 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma2d.h1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h1182 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1193 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma2d.h1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h1175 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1186 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_dma2d.c301 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->AlphaMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_dma2d.c336 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_dma2d.c336 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_dma2d.c357 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_dma2d.c336 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->RBSwapMode | \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h6422 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6423 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f429xx.h6481 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6482 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f439xx.h6668 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6669 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f437xx.h6614 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6615 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h6756 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6757 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f745xx.h6513 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6514 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f756xx.h6756 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6757 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f746xx.h6568 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6569 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f765xx.h6979 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
6980 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f777xx.h7261 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
7262 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */
Dstm32f767xx.h7073 #define DMA2D_FGPFCCR_ALPHA_Pos (24U) macro
7074 #define DMA2D_FGPFCCR_ALPHA_Msk (0xFFUL << DMA2D_FGPFCCR_ALPHA_Pos) /*!< 0xFF000000 */

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