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Searched refs:DISABLE (Results 1 – 25 of 214) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_eth.c1575 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1577 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1580 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1582 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1584 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1586 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1588 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1590 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1592 … ETH_MACTSCR_TSMSTRENA) >> ETH_MACTSCR_TSMSTRENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1595 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h7rsxx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_eth.c1593 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1595 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1598 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1600 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1602 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1606 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1610 … ETH_MACTSCR_TSMSTRENA) >> ETH_MACTSCR_TSMSTRENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1613 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h7xx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_eth.c1593 … ETH_MACTSCR_TSCFUPDT) >> ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1595 … ETH_MACTSCR_TSENALL) >> ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1598 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1600 … ETH_MACTSCR_TSVER2ENA) >> ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1602 … ETH_MACTSCR_TSIPENA) >> ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1604 … ETH_MACTSCR_TSIPV6ENA) >> ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1606 … ETH_MACTSCR_TSIPV4ENA) >> ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1608 … ETH_MACTSCR_TSEVNTENA) >> ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1610 … ETH_MACTSCR_TSMSTRENA) >> ETH_MACTSCR_TSMSTRENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1613 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32h5xx_hal_eth_ex.c424 … ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
427 ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
429 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
431 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
433 ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
438 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
505 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
506 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
511 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
512 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/
Dstm32h7xx_hal_eth.c1906 …onf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC)>> 4) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1908 …etryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1909 …eDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1910 …onf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1911 …foreTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1912 …nf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1915 …onf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1916 macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >>17) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1917 …acconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >>19) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
1918 …aticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
[all …]
Dstm32h7xx_hal_eth_ex.c327 …InStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
329 …erVLANTag = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
330 …Processing = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
331 …hTableMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
332 …gInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
335 …nverceMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
401 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
402 …>SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
407 …ourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
408 …->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c1635 ETH_MACTSCR_AV8021ASMEN_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1637 ETH_MACTSCR_TSENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1639 ETH_MACTSCR_TSUPDT_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1641 ETH_MACTSCR_TSENALL_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1643 ETH_MACTSCR_TSCTRLSSR_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1645 ETH_MACTSCR_TSVER2ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1647 ETH_MACTSCR_TSIPENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1649 ETH_MACTSCR_TSIPV6ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1651 ETH_MACTSCR_TSIPV4ENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1653 ETH_MACTSCR_TSEVNTENA_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32n6xx_hal_eth_ex.c467 … ETH_MACVTCR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
469 …VLANTag = ((READ_BIT(heth->Instance->MACVTCR, ETH_MACVTCR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
471 … ETH_MACVTCR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
473 … ETH_MACVTCR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
475 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
480 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
482 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
484 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
488 ? DISABLE : ENABLE; in HAL_ETHEx_GetRxVLANConfig()
566 …urceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; in HAL_ETHEx_GetTxVLANConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_eth.c1614 … ETH_PTPTSCR_TSFCU) >> ETH_PTPTSCR_TSFCU_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1616 … ETH_PTPTSCR_TSSARFE) >> ETH_PTPTSCR_TSSARFE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1619 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1621 … ETH_PTPTSCR_TSPTPPSV2E) >> ETH_PTPTSCR_TSPTPPSV2E_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1624 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1626 … ETH_PTPTSCR_TSSIPV6FE) >> ETH_PTPTSCR_TSSIPV6FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1628 … ETH_PTPTSCR_TSSIPV4FE) >> ETH_PTPTSCR_TSSIPV4FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1630 … ETH_PTPTSCR_TSSEME) >> ETH_PTPTSCR_TSSEME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1632 … ETH_PTPTSCR_TSSMRME) >> ETH_PTPTSCR_TSSMRME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1634 … ETH_PTPTSCR_TSPFFMAE) >> ETH_PTPTSCR_TSPFFMAE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32f7xx_hal_adc_ex.c447 (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) in HAL_ADCEx_InjectedPollForConversion()
668 if (hadc->Init.DMAContinuousRequests != DISABLE) in HAL_ADCEx_MultiModeStart_DMA()
868 if (sConfigInjected->AutoInjectedConv != DISABLE) in HAL_ADCEx_InjectedConfigChannel()
879 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) in HAL_ADCEx_InjectedConfigChannel()
1000 (hadc->Init.ContinuousConvMode == DISABLE) && in ADC_MultiModeDMAConvCplt()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_eth.c1614 … ETH_PTPTSCR_TSFCU) >> ETH_PTPTSCR_TSFCU_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1616 … ETH_PTPTSCR_TSSARFE) >> ETH_PTPTSCR_TSSARFE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1619 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1621 … ETH_PTPTSCR_TSPTPPSV2E) >> ETH_PTPTSCR_TSPTPPSV2E_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1624 ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1626 … ETH_PTPTSCR_TSSIPV6FE) >> ETH_PTPTSCR_TSSIPV6FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1628 … ETH_PTPTSCR_TSSIPV4FE) >> ETH_PTPTSCR_TSSIPV4FE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1630 … ETH_PTPTSCR_TSSEME) >> ETH_PTPTSCR_TSSEME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1632 … ETH_PTPTSCR_TSSMRME) >> ETH_PTPTSCR_TSSMRME_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
1634 … ETH_PTPTSCR_TSPFFMAE) >> ETH_PTPTSCR_TSPFFMAE_Pos) > 0U) ? ENABLE : DISABLE; in HAL_ETH_PTP_GetConfig()
[all …]
Dstm32f4xx_hal_pwr_ex.c169 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableBkUpReg()
200 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableFlashPowerDown()
372 *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableMainRegulatorLowVoltage()
394 *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableLowRegulatorLowVoltage()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_sdmmc.h741 #define __SDIO_DISABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
755 #define __SDIO_DMA_DISABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
933 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
947 #define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
961 #define __SDIO_OPERATION_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
975 #define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
987 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
1011 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_sdmmc.h741 #define __SDIO_DISABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
755 #define __SDIO_DMA_DISABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
933 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
947 #define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
961 #define __SDIO_OPERATION_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
975 #define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
987 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
1011 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_sdmmc.h749 #define __SDIO_DISABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
763 #define __SDIO_DMA_DISABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
941 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
955 #define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
969 #define __SDIO_OPERATION_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
983 #define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
996 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
1020 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_sdmmc.h737 #define __SDIO_DISABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
751 #define __SDIO_DMA_DISABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
929 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
943 #define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
957 #define __SDIO_OPERATION_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
971 #define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
983 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
1007 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_pwr_ex.c91 *(__IO uint32_t *) CR_FWU_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableFastWakeUp()
111 *(__IO uint32_t *) CR_ULP_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableUltraLowPower()
138 *(__IO uint32_t *) CR_LPRUN_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableLowPowerRunMode()
139 *(__IO uint32_t *) CR_LPSDSR_BB = (uint32_t)DISABLE; in HAL_PWREx_DisableLowPowerRunMode()
Dstm32l1xx_hal_flash_ex.c426 status = FLASH_OB_WRPConfig(pOBInit, DISABLE); in HAL_FLASHEx_OBProgram()
566 status = FLASH_OB_PCROPConfig(pAdvOBInit, DISABLE); in HAL_FLASHEx_AdvOBProgram()
1184 FunctionalState pcropstate = DISABLE; in FLASH_OB_PCROPConfig()
1190 if (NewState == DISABLE) in FLASH_OB_PCROPConfig()
1245 if (NewState != DISABLE) in FLASH_OB_WRPConfigWRP1OrPCROP1()
1291 if (NewState != DISABLE) in FLASH_OB_WRPConfigWRP2OrPCROP2()
1337 if (NewState != DISABLE) in FLASH_OB_WRPConfigWRP3()
1382 if (NewState != DISABLE) in FLASH_OB_WRPConfigWRP4()
Dstm32l1xx_hal_adc.c452 if(hadc->Init.DiscontinuousConvMode != DISABLE) in HAL_ADC_Init()
564 if (hadc->Init.ContinuousConvMode == DISABLE) in HAL_ADC_Init()
1258 if (hadc->Init.LowPowerAutoWait == DISABLE) in HAL_ADC_PollForConversion()
1274 (hadc->Init.ContinuousConvMode == DISABLE) && in HAL_ADC_PollForConversion()
1713 (hadc->Init.ContinuousConvMode == DISABLE) && in HAL_ADC_IRQHandler()
1764 (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) in HAL_ADC_IRQHandler()
2314 (hadc->Init.ContinuousConvMode == DISABLE) && in ADC_DMAConvCplt()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_adc_ex.c448 (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) in HAL_ADCEx_InjectedPollForConversion()
669 if (hadc->Init.DMAContinuousRequests != DISABLE) in HAL_ADCEx_MultiModeStart_DMA()
868 if (sConfigInjected->AutoInjectedConv != DISABLE) in HAL_ADCEx_InjectedConfigChannel()
879 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) in HAL_ADCEx_InjectedConfigChannel()
1000 (hadc->Init.ContinuousConvMode == DISABLE) && in ADC_MultiModeDMAConvCplt()
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp1xx.h166 DISABLE = 0, enumerator
167 ENABLE = !DISABLE
169 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u0xx.h123 DISABLE = 0, enumerator
124 ENABLE = !DISABLE
126 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c0xx.h122 DISABLE = 0, enumerator
123 ENABLE = !DISABLE
125 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))

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