| /hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/ |
| D | stm32f7xx_hal_eth.c | 992 while ((dmatxdesc->DESC0 & ETH_DMATXDESC_OWN) != (uint32_t)RESET) in HAL_ETH_Transmit()
1009 dmatxdesc->DESC0 = (ETH_DMATXDESC_FS | ETH_DMATXDESC_LS); in HAL_ETH_Transmit()
1108 …while ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) in HAL_ETH_ReadData()
1111 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_LS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1118 …if ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_FS) != (uint32_t)RESET) || (heth->RxDescList.pRxStar… in HAL_ETH_ReadData()
1121 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_FS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1128 bufflength = ((dmarxdesc->DESC0 & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT); in HAL_ETH_ReadData()
1131 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_LS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1134 heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC0; in HAL_ETH_ReadData()
1244 SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN); in ETH_UpdateDescriptor()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/ |
| D | stm32f4xx_hal_eth.c | 992 while ((dmatxdesc->DESC0 & ETH_DMATXDESC_OWN) != (uint32_t)RESET) in HAL_ETH_Transmit()
1009 dmatxdesc->DESC0 = (ETH_DMATXDESC_FS | ETH_DMATXDESC_LS); in HAL_ETH_Transmit()
1108 …while ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) in HAL_ETH_ReadData()
1111 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_LS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1118 …if ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_FS) != (uint32_t)RESET) || (heth->RxDescList.pRxStar… in HAL_ETH_ReadData()
1121 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_FS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1128 bufflength = ((dmarxdesc->DESC0 & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT); in HAL_ETH_ReadData()
1131 if (READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_LS) != (uint32_t)RESET) in HAL_ETH_ReadData()
1134 heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC0; in HAL_ETH_ReadData()
1244 SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN); in ETH_UpdateDescriptor()
[all …]
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/ |
| D | stm32h7xx_hal_eth.c | 705 WRITE_REG(dmarxdesc->DESC0, (uint32_t)pBuffer1); in HAL_ETH_DescAssignMemory()
1160 WRITE_REG(dmarxdesc->DESC0, dmarxdesc->BackupAddr0); in HAL_ETH_IsRxDataAvailable()
1367 RxPacketInfo->VlanTag = READ_BIT(dmarxdesc->DESC0, ETH_DMARXNDESCWBF_OVT); in HAL_ETH_GetRxDataInfo()
1368 RxPacketInfo->InnerVlanTag = READ_BIT(dmarxdesc->DESC0, ETH_DMARXNDESCWBF_IVT) >> 16; in HAL_ETH_GetRxDataInfo()
1372 RxPacketInfo->VlanTag = READ_BIT(dmarxdesc->DESC0, ETH_DMARXNDESCWBF_OVT); in HAL_ETH_GetRxDataInfo()
1431 WRITE_REG(dmarxdesc->DESC0, dmarxdesc->BackupAddr0); in HAL_ETH_BuildRxDescriptors()
2662 WRITE_REG(dmatxdesc->DESC0, 0x0); in ETH_DMATxDescListInit()
2698 WRITE_REG(dmarxdesc->DESC0, 0x0); in ETH_DMARxDescListInit()
2822 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
2923 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
| D | stm32n6xx_hal_eth.c | 1141 heth->RxDescList[ch].TimeStamp.TimeStampLow = dmarxdesc_next->DESC0; in HAL_ETH_ReadData()
1235 WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); in ETH_UpdateDescriptor()
1241 WRITE_REG(dmarxdesc->DESC0, (uint32_t)dmarxdesc->BackupAddr0); in ETH_UpdateDescriptor()
1494 timestamp->TimeStampLow = heth->Init.TxDesc[ch][idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1824 timestamp->TimeStampLow = dmatxdesc->DESC0; in HAL_ETH_PTP_GetTxTimestamp()
3195 WRITE_REG(dmatxdesc->DESC0, 0x0U); in ETH_DMATxDescListInit()
3239 WRITE_REG(dmarxdesc->DESC0, 0x0U); in ETH_DMARxDescListInit()
3379 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3488 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_hal_eth.c | 1073 heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC0; in HAL_ETH_ReadData()
1185 WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); in ETH_UpdateDescriptor()
1438 timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1760 timestamp->TimeStampLow = dmatxdesc->DESC0; in HAL_ETH_PTP_GetTxTimestamp()
2950 WRITE_REG(dmatxdesc->DESC0, 0x0U); in ETH_DMATxDescListInit()
2987 WRITE_REG(dmarxdesc->DESC0, 0x0U); in ETH_DMARxDescListInit()
3121 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3228 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_eth.c | 1101 heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc_temp->DESC0; in HAL_ETH_ReadData()
1194 WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); in ETH_UpdateDescriptor()
1447 timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1778 timestamp->TimeStampLow = dmatxdesc->DESC0; in HAL_ETH_PTP_GetTxTimestamp()
3016 WRITE_REG(dmatxdesc->DESC0, 0x0U); in ETH_DMATxDescListInit()
3053 WRITE_REG(dmarxdesc->DESC0, 0x0U); in ETH_DMARxDescListInit()
3187 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3294 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_eth.c | 1101 heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc_temp->DESC0; in HAL_ETH_ReadData()
1194 WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); in ETH_UpdateDescriptor()
1447 timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1778 timestamp->TimeStampLow = dmatxdesc->DESC0; in HAL_ETH_PTP_GetTxTimestamp()
2968 WRITE_REG(dmatxdesc->DESC0, 0x0U); in ETH_DMATxDescListInit()
3005 WRITE_REG(dmarxdesc->DESC0, 0x0U); in ETH_DMARxDescListInit()
3139 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3246 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
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| /hal_stm32-latest/stm32cube/stm32f7xx/ |
| D | README | 62 *Fix: Use the correct register DESC0
64 checking the ETH_DMATXDESC_LS and ETH_DMATXDESC_TTSS flags in the DESC0 register.
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_hal_eth.h | 71 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_hal_eth.h | 71 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_hal_eth.h | 60 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_hal_eth.h | 60 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_hal_eth.h | 71 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/Legacy/ |
| D | stm32h7xx_hal_eth_legacy.h | 60 __IO uint32_t DESC0; member
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_hal_eth.h | 94 __IO uint32_t DESC0; member
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