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Searched refs:DCACHE_CR_CACHECMD_Pos (Results 1 – 17 of 17) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h8923 #define DCACHE_CR_CACHECMD_Pos (8U) macro
8924 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
8926 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
8927 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
8928 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32h562xx.h9649 #define DCACHE_CR_CACHECMD_Pos (8U) macro
9650 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
9652 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
9653 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
9654 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32h533xx.h9332 #define DCACHE_CR_CACHECMD_Pos (8U) macro
9333 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
9335 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
9336 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
9337 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32h573xx.h12142 #define DCACHE_CR_CACHECMD_Pos (8U) macro
12143 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
12145 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
12146 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
12147 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32h563xx.h11733 #define DCACHE_CR_CACHECMD_Pos (8U) macro
11734 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
11736 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
11737 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
11738 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h9628 #define DCACHE_CR_CACHECMD_Pos (8U) macro
9629 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
9631 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
9632 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
9633 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u535xx.h9228 #define DCACHE_CR_CACHECMD_Pos (8U) macro
9229 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
9231 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
9232 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
9233 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u575xx.h10250 #define DCACHE_CR_CACHECMD_Pos (8U) macro
10251 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
10253 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
10254 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
10255 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u585xx.h10699 #define DCACHE_CR_CACHECMD_Pos (8U) macro
10700 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
10702 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
10703 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
10704 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u595xx.h10560 #define DCACHE_CR_CACHECMD_Pos (8U) macro
10561 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
10563 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
10564 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
10565 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5a5xx.h11009 #define DCACHE_CR_CACHECMD_Pos (8U) macro
11010 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
11012 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
11013 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
11014 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5f7xx.h12058 #define DCACHE_CR_CACHECMD_Pos (8U) macro
12059 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
12061 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
12062 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
12063 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u599xx.h14279 #define DCACHE_CR_CACHECMD_Pos (8U) macro
14280 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
14282 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
14283 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
14284 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5g7xx.h12507 #define DCACHE_CR_CACHECMD_Pos (8U) macro
12508 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
12510 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
12511 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
12512 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5f9xx.h15184 #define DCACHE_CR_CACHECMD_Pos (8U) macro
15185 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
15187 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
15188 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
15189 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5a9xx.h14728 #define DCACHE_CR_CACHECMD_Pos (8U) macro
14729 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
14731 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
14732 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
14733 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…
Dstm32u5g9xx.h15633 #define DCACHE_CR_CACHECMD_Pos (8U) macro
15634 #define DCACHE_CR_CACHECMD_Msk (0x7UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000700…
15636 #define DCACHE_CR_CACHECMD_0 (0x1UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000100…
15637 #define DCACHE_CR_CACHECMD_1 (0x2UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000200…
15638 #define DCACHE_CR_CACHECMD_2 (0x4UL << DCACHE_CR_CACHECMD_Pos) /*!< 0x00000400…