Home
last modified time | relevance | path

Searched refs:DBPR (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c506 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
509 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCC_OscConfig()
514 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
646 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
649 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCC_OscConfig()
654 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
Dstm32wbaxx_hal_pwr.c209 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_PWR_EnableBkUpAccess()
220 CLEAR_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32wbaxx_hal_rcc_ex.c338 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCCEx_PeriphCLKConfig()
343 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c788 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
791 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCC_OscConfig()
796 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
895 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
898 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCC_OscConfig()
903 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCC_OscConfig()
Dstm32u5xx_hal_pwr.c217 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_PWR_EnableBkUpAccess()
228 CLEAR_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32u5xx_hal_rcc_ex.c825 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in HAL_RCCEx_PeriphCLKConfig()
830 while (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
3624 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCCEx_EnableLSCO()
3657 if (HAL_IS_BIT_CLR(PWR->DBPR, PWR_DBPR_DBP)) in HAL_RCCEx_DisableLSCO()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_pwr.h1017 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in LL_PWR_EnableBkUpAccess()
1027 CLEAR_BIT(PWR->DBPR, PWR_DBPR_DBP); in LL_PWR_DisableBkUpAccess()
1037 return ((READ_BIT(PWR->DBPR, PWR_DBPR_DBP) == (PWR_DBPR_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_pwr.h2483 SET_BIT(PWR->DBPR, PWR_DBPR_DBP); in LL_PWR_EnableBkUpAccess()
2493 CLEAR_BIT(PWR->DBPR, PWR_DBPR_DBP); in LL_PWR_DisableBkUpAccess()
2503 return ((READ_BIT(PWR->DBPR, PWR_DBPR_DBP) == (PWR_DBPR_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h508 …__IO uint32_t DBPR; /*!< PWR disable backup domain register, Address off… member
Dstm32wba52xx.h599 …__IO uint32_t DBPR; /*!< PWR disable backup domain register, Address off… member
Dstm32wba54xx.h626 …__IO uint32_t DBPR; /*!< PWR disable backup domain register, Address off… member
Dstm32wba5mxx.h626 …__IO uint32_t DBPR; /*!< PWR disable backup domain register, Address off… member
Dstm32wba55xx.h626 …__IO uint32_t DBPR; /*!< PWR disable backup domain register, Address off… member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h896 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u535xx.h830 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u575xx.h893 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u585xx.h960 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u595xx.h930 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5a5xx.h997 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5f7xx.h1091 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u599xx.h1111 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5g7xx.h1158 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5f9xx.h1195 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5a9xx.h1178 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member
Dstm32u5g9xx.h1262 …__IO uint32_t DBPR; /*!< Power disable backup domain register, Address offset: 0x… member