Home
last modified time | relevance | path

Searched refs:DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3507 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
3508 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32h523xx.h4588 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
4589 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32h562xx.h5019 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5020 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32h533xx.h4997 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
4998 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32h573xx.h5648 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5649 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32h563xx.h5239 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5240 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h5673 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5674 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u535xx.h5273 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5274 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u575xx.h5676 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5677 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u585xx.h6125 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6126 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u595xx.h5927 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
5928 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5a5xx.h6376 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6377 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5f7xx.h6223 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6224 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u599xx.h6215 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6216 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5g7xx.h6672 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6673 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5f9xx.h6343 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6344 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5a9xx.h6664 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6665 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk
Dstm32u5g9xx.h6792 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk (0x1UL << DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Pos) macro
6793 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk