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Searched refs:COMP_CSR_INPSEL_Pos (Results 1 – 25 of 74) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8392 #define COMP_CSR_INPSEL_Pos (8U) macro
8393 #define COMP_CSR_INPSEL_Msk (0x7UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000700 */
8395 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
8396 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
8397 #define COMP_CSR_INPSEL_2 (0x4UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000400 */
Dstm32u083xx.h9329 #define COMP_CSR_INPSEL_Pos (8U) macro
9330 #define COMP_CSR_INPSEL_Msk (0x7UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000700 */
9332 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
9333 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
9334 #define COMP_CSR_INPSEL_2 (0x4UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000400 */
Dstm32u073xx.h9059 #define COMP_CSR_INPSEL_Pos (8U) macro
9060 #define COMP_CSR_INPSEL_Msk (0x7UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000700 */
9062 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
9063 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
9064 #define COMP_CSR_INPSEL_2 (0x4UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g051xx.h7468 #define COMP_CSR_INPSEL_Pos (8U) macro
7469 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
7471 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
7472 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
Dstm32g061xx.h7772 #define COMP_CSR_INPSEL_Pos (8U) macro
7773 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
7775 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
7776 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
Dstm32g071xx.h7852 #define COMP_CSR_INPSEL_Pos (8U) macro
7853 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
7855 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
7856 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
Dstm32g081xx.h8156 #define COMP_CSR_INPSEL_Pos (8U) macro
8157 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
8159 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
8160 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
Dstm32g0c1xx.h9740 #define COMP_CSR_INPSEL_Pos (8U) macro
9741 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
9743 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
9744 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
Dstm32g0b1xx.h9436 #define COMP_CSR_INPSEL_Pos (8U) macro
9437 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000300 */
9439 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
9440 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1730 #define COMP_CSR_INPSEL_Pos (7U) macro
1731 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1733 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1734 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wle5xx.h1730 #define COMP_CSR_INPSEL_Pos (7U) macro
1731 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1733 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1734 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wl5mxx.h1912 #define COMP_CSR_INPSEL_Pos (7U) macro
1913 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1915 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1916 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wl54xx.h1912 #define COMP_CSR_INPSEL_Pos (7U) macro
1913 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1915 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1916 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wl55xx.h1912 #define COMP_CSR_INPSEL_Pos (7U) macro
1913 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1915 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1916 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h1585 #define COMP_CSR_INPSEL_Pos (7U) macro
1586 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1588 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1589 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wb35xx.h2228 #define COMP_CSR_INPSEL_Pos (7U) macro
2229 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
2231 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
2232 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wb55xx.h2274 #define COMP_CSR_INPSEL_Pos (7U) macro
2275 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
2277 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
2278 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32wb5mxx.h2274 #define COMP_CSR_INPSEL_Pos (7U) macro
2275 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
2277 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
2278 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h1585 #define COMP_CSR_INPSEL_Pos (7U) macro
1586 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
1588 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
1589 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h9067 #define COMP_CSR_INPSEL_Pos (7U) macro
9068 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
9070 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
9071 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32l412xx.h8842 #define COMP_CSR_INPSEL_Pos (7U) macro
8843 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
8845 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
8846 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32l433xx.h13531 #define COMP_CSR_INPSEL_Pos (7U) macro
13532 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
13534 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
13535 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32l451xx.h13661 #define COMP_CSR_INPSEL_Pos (7U) macro
13662 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
13664 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
13665 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32l442xx.h12697 #define COMP_CSR_INPSEL_Pos (7U) macro
12698 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
12700 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
12701 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */
Dstm32l431xx.h13302 #define COMP_CSR_INPSEL_Pos (7U) macro
13303 #define COMP_CSR_INPSEL_Msk (0x3UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000180 */
13305 #define COMP_CSR_INPSEL_0 (0x1UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000080 */
13306 #define COMP_CSR_INPSEL_1 (0x2UL << COMP_CSR_INPSEL_Pos) /*!< 0x00000100 */

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