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Searched refs:CMAR (Results 1 – 25 of 249) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h922 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR, SrcAd… in LL_DMA_ConfigAddresses()
929 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR, DstAd… in LL_DMA_ConfigAddresses()
952 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR, Memor… in LL_DMA_SetMemoryAddress()
994 …turn (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR)); in LL_DMA_GetMemoryAddress()
1058 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR, Memor… in LL_DMA_SetM2MDstAddress()
1098 …turn (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_dma.h934 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
941 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
965 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1009 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetMemoryAddress()
1076 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1118 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h936 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
943 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
966 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1008 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1072 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1112 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h990 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
997 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1020 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1062 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1126 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1166 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_dma.h987 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
994 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1017 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1059 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetMemoryAddress()
1123 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1163 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_dma.h998 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, SrcAddress… in LL_DMA_ConfigAddresses()
1005 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, DstAddress… in LL_DMA_ConfigAddresses()
1029 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetMemoryAddress()
1073 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetMemoryAddress()
1140 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetM2MDstAddress()
1182 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h1004 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, SrcAddress… in LL_DMA_ConfigAddresses()
1011 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, DstAddress… in LL_DMA_ConfigAddresses()
1035 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetMemoryAddress()
1079 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetMemoryAddress()
1146 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetM2MDstAddress()
1188 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h972 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
979 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1002 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1044 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1108 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1148 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h973 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
980 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1003 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1045 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1109 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1149 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h1321 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, SrcAddress… in LL_DMA_ConfigAddresses()
1328 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, DstAddress… in LL_DMA_ConfigAddresses()
1352 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetMemoryAddress()
1396 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetMemoryAddress()
1463 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetM2MDstAddress()
1505 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h1065 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
1072 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1095 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1137 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1201 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1241 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h1056 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, SrcAddress… in LL_DMA_ConfigAddresses()
1063 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, DstAddress… in LL_DMA_ConfigAddresses()
1087 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetMemoryAddress()
1131 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetMemoryAddress()
1198 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddr… in LL_DMA_SetM2MDstAddress()
1240 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h1062 …MA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
1069 …MA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1095 …Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1143 …EAD_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR)); in LL_DMA_GetMemoryAddress()
1216 …Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1262 …EAD_REG(((DMA_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_dma.c223 hdma->Instance->CMAR = 0U; in HAL_DMA_DeInit()
840 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
849 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_dma.c222 hdma->Instance->CMAR = 0U; in HAL_DMA_DeInit()
844 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
853 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_dma.c243 hdma->Instance->CMAR = 0U; in HAL_DMA_DeInit()
872 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
881 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_mdma.c315 hmdma->Instance->CMAR = 0; in HAL_MDMA_DeInit()
366 hmdma->Instance->CMAR = MaskAddress; in HAL_MDMA_ConfigPostRequestMask()
604 pNode->CMAR = 0; in HAL_MDMA_LinkedList_CreateNode()
679 pNode->CMAR = pNodeConfig->PostRequestMaskAddress; in HAL_MDMA_LinkedList_CreateNode()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_mdma.c323 hmdma->Instance->CMAR = 0; in HAL_MDMA_DeInit()
377 hmdma->Instance->CMAR = MaskAddress; in HAL_MDMA_ConfigPostRequestMask()
616 pNode->CMAR = 0; in HAL_MDMA_LinkedList_CreateNode()
691 pNode->CMAR = pNodeConfig->PostRequestMaskAddress; in HAL_MDMA_LinkedList_CreateNode()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_dma.c856 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
865 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_hal_dma.c870 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
879 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_dma.c879 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
888 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_dma.c1008 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
1017 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_dma.c1039 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
1048 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_dma.c1101 hdma->Instance->CMAR = SrcAddress;
1110 hdma->Instance->CMAR = DstAddress;
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_dma.c1099 hdma->Instance->CMAR = SrcAddress;
1108 hdma->Instance->CMAR = DstAddress;

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