| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_hal_mdf.c | 293 if ((ADF1->CKGCR & MDF_CKGCR_CKGACTIVE) != 0U) in HAL_MDF_Init()
303 ADF1->CKGCR = 0U; in HAL_MDF_Init()
304 ADF1->CKGCR |= ((hmdf->Init.CommonParam.ProcClockDivider - 1U) << MDF_CKGCR_PROCDIV_Pos); in HAL_MDF_Init()
310 … ADF1->CKGCR |= (((hmdf->Init.CommonParam.OutputClock.Divider - 1U) << MDF_CKGCR_CCKDIV_Pos) | in HAL_MDF_Init()
317 ADF1->CKGCR |= (hmdf->Init.CommonParam.OutputClock.Trigger.Source | in HAL_MDF_Init()
324 ADF1->CKGCR |= MDF_CKGCR_CKGDEN; in HAL_MDF_Init()
419 ADF1->CKGCR &= ~(MDF_CKGCR_CKGDEN); in HAL_MDF_DeInit()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
| D | stm32n6xx_hal_mdf.c | 357 if ((mdfBase->CKGCR & MDF_CKGCR_CCKACTIVE) != 0U) in HAL_MDF_Init()
375 mdfBase->CKGCR = 0U; in HAL_MDF_Init()
376 … mdfBase->CKGCR |= ((hmdf->Init.CommonParam.ProcClockDivider - 1U) << MDF_CKGCR_PROCDIV_Pos); in HAL_MDF_Init()
382 … mdfBase->CKGCR |= (((hmdf->Init.CommonParam.OutputClock.Divider - 1U) << MDF_CKGCR_CCKDIV_Pos) | in HAL_MDF_Init()
396 mdfBase->CKGCR |= (hmdf->Init.CommonParam.OutputClock.Trigger.Source | in HAL_MDF_Init()
403 mdfBase->CKGCR |= MDF_CKGCR_CKDEN; in HAL_MDF_Init()
533 p_mdf_base->CKGCR &= ~(MDF_CKGCR_CKDEN); in HAL_MDF_DeInit()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_mdf.c | 361 if ((mdfBase->CKGCR & MDF_CKGCR_CCKACTIVE) != 0U) in HAL_MDF_Init()
379 mdfBase->CKGCR = 0U; in HAL_MDF_Init()
380 … mdfBase->CKGCR |= ((hmdf->Init.CommonParam.ProcClockDivider - 1U) << MDF_CKGCR_PROCDIV_Pos); in HAL_MDF_Init()
386 … mdfBase->CKGCR |= (((hmdf->Init.CommonParam.OutputClock.Divider - 1U) << MDF_CKGCR_CCKDIV_Pos) | in HAL_MDF_Init()
400 mdfBase->CKGCR |= (hmdf->Init.CommonParam.OutputClock.Trigger.Source | in HAL_MDF_Init()
407 mdfBase->CKGCR |= MDF_CKGCR_CKDEN; in HAL_MDF_Init()
537 p_mdf_base->CKGCR &= ~(MDF_CKGCR_CKDEN); in HAL_MDF_DeInit()
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| /hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
| D | stm32u545xx.h | 759 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u535xx.h | 720 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u575xx.h | 773 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u585xx.h | 813 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u595xx.h | 797 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5a5xx.h | 837 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5f7xx.h | 958 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u599xx.h | 978 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5g7xx.h | 998 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5f9xx.h | 1062 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5a9xx.h | 1018 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32u5g9xx.h | 1102 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
| D | stm32h7r3xx.h | 1235 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32h7s7xx.h | 1349 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32h7s3xx.h | 1328 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32h7r7xx.h | 1254 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| /hal_stm32-latest/stm32cube/stm32n6xx/soc/ |
| D | stm32n645xx.h | 1723 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32n657xx.h | 1849 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32n655xx.h | 1821 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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| D | stm32n647xx.h | 1751 …__IO uint32_t CKGCR; /*!< MDF Clock Generator Control Register, Address offset: 0x04 … member
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