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Searched refs:CCIPR1 (Results 1 – 25 of 50) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc_ex.h1041 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_I2C1SEL, (uint32_t)(__I2C1_CLKSOURCE__))
1049 #define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C1SEL)))
1061 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_I2C2SEL, (uint32_t)(__I2C2_CLKSOURCE__))
1069 #define __HAL_RCC_GET_I2C2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C2SEL)))
1081 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_I2C3SEL, (uint32_t)(__I2C3_CLKSOURCE__))
1089 #define __HAL_RCC_GET_I2C3_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C3SEL)))
1123 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART1SEL, (uint32_t)(__USART1_CLKSOURCE__))
1132 #define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART1SEL)))
1145 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART2SEL, (uint32_t)(__USART2_CLKSOURCE__))
1154 #define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART2SEL)))
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Dstm32l5xx_ll_rcc.h2362 MODIFY_REG(RCC->CCIPR1, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU)); in LL_RCC_SetUSARTClockSource()
2382 MODIFY_REG(RCC->CCIPR1, (UARTxSource >> 16U), (UARTxSource & 0x0000FFFFU)); in LL_RCC_SetUARTClockSource()
2397 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_LPUART1SEL, LPUARTxSource); in LL_RCC_SetLPUARTClockSource()
2449 MODIFY_REG(RCC->CCIPR1, (LPTIMxSource & 0xFFFF0000U), (LPTIMxSource << 16U)); in LL_RCC_SetLPTIMClockSource()
2463 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_FDCANSEL, FDCANxSource); in LL_RCC_SetFDCANClockSource()
2511 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_CLK48MSEL, SDMMCxSource); in LL_RCC_SetSDMMCClockSource()
2526 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_CLK48MSEL, RNGxSource); in LL_RCC_SetRNGClockSource()
2541 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_CLK48MSEL, USBxSource); in LL_RCC_SetUSBClockSource()
2555 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADCSEL, ADCxSource); in LL_RCC_SetADCClockSource()
2624 return (uint32_t)(READ_BIT(RCC->CCIPR1, USARTx) | (USARTx << 16U)); in LL_RCC_GetUSARTClockSource()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc_ex.h1154 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL,(0x00000000)); \
1156 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL,(uint32_t)(__TIMICSOURCE__));\
1162 #define __HAL_RCC_TIMIC_CLK_DISABLE() MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL,(0x00000000))
1451 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL, (uint32_t)(__CLK48_SOURCE__))
1460 #define __HAL_RCC_GET_ICLK_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL)))
1471 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_FDCANSEL, (uint32_t)(__FDCAN1_CLKSOURCE__))
1479 #define __HAL_RCC_GET_FDCAN1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_FDCANSEL)))
1533 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_LPTIM2SEL, (uint32_t)(__LPTIM2_CLKSOURCE__))
1542 #define __HAL_RCC_GET_LPTIM2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_LPTIM2SEL)))
1553 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SPI1SEL, (uint32_t)(__SPI1CLKSource__))
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Dstm32u5xx_ll_rcc.h2600 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, SystickSource); in LL_RCC_SetSystickClockSource()
2698 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL)); in LL_RCC_GetSystickClockSource()
2908 MODIFY_REG(RCC->CCIPR1, UARTxSource >> 16U, (UARTxSource & 0x0000FFFFU)); in LL_RCC_SetUARTClockSource()
3028 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_FDCANSEL, FDCANxSource); in LL_RCC_SetFDCANClockSource()
3081 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL, SDMMCxSource); in LL_RCC_SetSDMMCClockSource()
3127 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL, USBxSource); in LL_RCC_SetUSBClockSource()
3325 return (uint32_t)(READ_BIT(RCC->CCIPR1, UARTx) | (UARTx << 16U)); in LL_RCC_GetUARTClockSource()
3454 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL, TIMICSource); in LL_RCC_SetTIMICClockSource()
3470 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL)); in LL_RCC_GetTIMICClockSource()
3485 return (uint32_t)(READ_BIT(RCC->CCIPR1, FDCANx)); in LL_RCC_GetFDCANClockSource()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc_ex.h749 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADCSEL, (uint32_t)(__ADC_CLKSOURCE__))
757 #define __HAL_RCC_GET_ADC_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADCSEL)))
770 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADF1SEL, (uint32_t)(__ADF1_CLKSOURCE__))
781 #define __HAL_RCC_GET_ADF1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADF1SEL)))
809 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_CKPERSEL, (uint32_t)(__CLKP_CLKSOURCE__))
817 #define __HAL_RCC_GET_CLKP_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_CKPERSEL)))
827 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ETH1REFCKSEL, (uint32_t)(__ETH1REF_CLKSOURCE__))
835 #define __HAL_RCC_GET_ETH1REF_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ETH1REFCKSEL)))
844 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ETH1PHYCKSEL, (uint32_t)(__ETH1PHY_CLKSOURCE__))
851 #define __HAL_RCC_GET_ETH1PHY_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ETH1PHYCKSEL)))
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Dstm32h7rsxx_ll_rcc.h2428 volatile uint32_t *pReg = (uint32_t *)((uint32_t)&RCC->CCIPR1 + LL_CLKSOURCE_REG(ClkSource)); in LL_RCC_SetClockSource()
2443 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADCSEL, ClkSource); in LL_RCC_SetADCClockSource()
2460 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADF1SEL, ClkSource); in LL_RCC_SetADFClockSource()
2488 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_CKPERSEL, ClkSource); in LL_RCC_SetCLKPClockSource()
2501 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ETH1PHYCKSEL, ClkSource); in LL_RCC_SetETHPHYClockSource()
2515 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ETH1REFCKSEL, ClkSource); in LL_RCC_SetETHREFClockSource()
2544 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_FMCSEL, ClkSource); in LL_RCC_SetFMCClockSource()
2642 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_OTGFSSEL, ClkSource); in LL_RCC_SetOTGFSClockSource()
2673 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_PSSISEL, ClkSource); in LL_RCC_SetPSSIClockSource()
2709 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SDMMC12SEL, ClkSource); in LL_RCC_SetSDMMCClockSource()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc_ex.h451 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART1SEL, (__USART1_CLKSOURCE__))
460 #define __HAL_RCC_GET_USART1_SOURCE() READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART1SEL)
473 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART2SEL, (__USART2_CLKSOURCE__))
482 #define __HAL_RCC_GET_USART2_SOURCE() READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART2SEL)
496 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_I2C1SEL, (__I2C1_CLKSOURCE__))
504 #define __HAL_RCC_GET_I2C1_SOURCE() READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C1SEL)
521 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_LPTIM2SEL, (__LPTIM2_CLKSOURCE__))
530 #define __HAL_RCC_GET_LPTIM2_SOURCE() READ_BIT(RCC->CCIPR1, RCC_CCIPR1_LPTIM2SEL)
542 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SPI1SEL, (__SPI1_CLKSOURCE__))
550 #define __HAL_RCC_GET_SPI1_SOURCE() READ_BIT(RCC->CCIPR1, RCC_CCIPR1_SPI1SEL)
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Dstm32wbaxx_ll_rcc.h1488 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, SystickSource); in LL_RCC_SetSystickClockSource()
1593 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL)); in LL_RCC_GetSystickClockSource()
1829 MODIFY_REG(RCC->CCIPR1, USARTxSource >> 16U, (USARTxSource & 0x0000FFFFU)); in LL_RCC_SetUSARTClockSource()
1975 return (uint32_t)(READ_BIT(RCC->CCIPR1, USARTx) | (USARTx << 16U)); in LL_RCC_GetUSARTClockSource()
2070 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL, TIMICSource); in LL_RCC_SetTIMICClockSource()
2082 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL)); in LL_RCC_GetTIMICClockSource()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc_ex.h1383 #define __HAL_RCC_TIMIC_ENABLE() SET_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL) /*!< HSI/1024, CSI/…
1384 #define __HAL_RCC_TIMIC_DISABLE() CLEAR_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL) /*!< No clock avail…
2418 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART1SEL, (uint32_t)(__USART1_CLKSOURCE__))
2431 #define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART1SEL)))
2448 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART2SEL, (uint32_t)(__USART2_CLKSOURCE__))
2461 #define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART2SEL)))
2478 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_USART3SEL, (uint32_t)(__USART3_CLKSOURCE__))
2491 #define __HAL_RCC_GET_USART3_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART3SEL)))
2507 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_UART4SEL, (uint32_t)(__UART4_CLKSOURCE__))
2518 #define __HAL_RCC_GET_UART4_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_UART4SEL)))
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Dstm32h5xx_ll_rcc.h2644 uint32_t *pReg = (uint32_t *)((uint32_t)&RCC->CCIPR1 + LL_CLKSOURCE_REG(ClkSource)); in LL_RCC_SetClockSource()
3348 …const uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&RCC->CCIPR1) + LL_CLKSOURCE_REG(Periph)… in LL_RCC_GetClockSource()
3682 SET_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL); in LL_RCC_TIMIC_Enable()
3692 CLEAR_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL); in LL_RCC_TIMIC_Disable()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_cortex.c441 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, (0x00000000U)); in HAL_SYSTICK_CLKSourceConfig()
446 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, RCC_CCIPR1_SYSTICKSEL_0); in HAL_SYSTICK_CLKSourceConfig()
451 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, RCC_CCIPR1_SYSTICKSEL_1); in HAL_SYSTICK_CLKSourceConfig()
481 systick_rcc_source = READ_BIT(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL); in HAL_SYSTICK_GetCLKSourceConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_cortex.c423 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, (0x00000000U)); in HAL_SYSTICK_CLKSourceConfig()
428 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, RCC_CCIPR1_SYSTICKSEL_0); in HAL_SYSTICK_CLKSourceConfig()
433 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, RCC_CCIPR1_SYSTICKSEL_1); in HAL_SYSTICK_CLKSourceConfig()
Dstm32wbaxx_hal_rcc_ex.c442 tmpreg = RCC->CCIPR1; in HAL_RCCEx_GetPeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h2915 volatile uint32_t *pReg = (uint32_t *)((uint32_t)&RCC->CCIPR1 + LL_CLKSOURCE_REG(ClkSource)); in LL_RCC_SetClockSource()
2927 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADCPRE, (Prescaler << RCC_CCIPR1_ADCPRE_Pos)); in LL_RCC_SetADCPrescaler()
2937 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADCPRE) >> RCC_CCIPR1_ADCPRE_Pos); in LL_RCC_GetADCPrescaler()
2956 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADC12SEL, ClkSource); in LL_RCC_SetADCClockSource()
2975 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADF1SEL, ClkSource); in LL_RCC_SetADFClockSource()
3009 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_DCMIPPSEL, ClkSource); in LL_RCC_SetDCMIPPClockSource()
3932 …const volatile uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&RCC->CCIPR1) + LL_CLKSOURCE_RE… in LL_RCC_GetClockSource()
3954 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADC12SEL)); in LL_RCC_GetADCClockSource()
3975 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADF1SEL)); in LL_RCC_GetADFClockSource()
4013 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_DCMIPPSEL)); in LL_RCC_GetDCMIPPClockSource()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc_ex.c922 srcclk = READ_BIT(RCC->CCIPR1, RCC_CCIPR1_CLK48MSEL); in HAL_RCCEx_GetPeriphCLKFreq()
1004 srcclk = READ_BIT(RCC->CCIPR1, RCC_CCIPR1_CLK48MSEL); in HAL_RCCEx_GetPeriphCLKFreq()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_rcc.c274 WRITE_REG(RCC->CCIPR1, 0x00000000U); in LL_RCC_DeInit()
Dstm32n6xx_hal_rcc_ex.c612 MODIFY_REG(RCC->CCIPR1, (RCC_CCIPR1_ADCPRE | RCC_CCIPR1_ADC12SEL), \ in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h597 …__IO uint32_t CCIPR1; /*!< IPs Clocks Configuration Register 1 Address … member
Dstm32wba52xx.h690 …__IO uint32_t CCIPR1; /*!< IPs Clocks Configuration Register 1 Address … member
Dstm32wba54xx.h717 …__IO uint32_t CCIPR1; /*!< IPs Clocks Configuration Register 1 Address … member
Dstm32wba5mxx.h717 …__IO uint32_t CCIPR1; /*!< IPs Clocks Configuration Register 1 Address … member
Dstm32wba55xx.h717 …__IO uint32_t CCIPR1; /*!< IPs Clocks Configuration Register 1 Address … member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h757 …__IO uint32_t CCIPR1; /*!< RCC IPs Clocks Configuration Register 1 … member
Dstm32h523xx.h921 …__IO uint32_t CCIPR1; /*!< RCC IPs Clocks Configuration Register 1 … member
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h921 …__IO uint32_t CCIPR1; /*!< RCC peripherals independent clock configuration register 1, … member

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