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Searched refs:BDSR (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_pwr.h316 …((__FLAG__) == PWR_FLAG_BRR) ? (READ_BIT(PWR->BDSR, PWR_BDSR_BRRDY) == PWR_BDSR_BR…
317 …((__FLAG__) == PWR_FLAG_VBATL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATL) == PWR_BDSR_VB…
318 …((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VB…
319 …((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TE…
320 …((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TE…
339 …((__FLAG__) == PWR_FLAG_BRR) ? (READ_BIT(PWR->BDSR, PWR_BDSR_BRRDY) == PWR_BDSR_BR…
340 …((__FLAG__) == PWR_FLAG_VBATL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATL) == PWR_BDSR_VB…
341 …((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VB…
342 …((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TE…
343 …((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TE…
Dstm32h5xx_ll_pwr.h1619 return ((READ_BIT(PWR->BDSR, PWR_BDSR_BRRDY) == (PWR_BDSR_BRRDY)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_BRR()
1629 return ((READ_BIT(PWR->BDSR, PWR_BDSR_VBATL) == (PWR_BDSR_VBATL)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VBATL()
1639 return ((READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == (PWR_BDSR_VBATH)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VBATH()
1650 return ((READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == (PWR_BDSR_TEMPL)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_TEMPL()
1661 return ((READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == (PWR_BDSR_TEMPH)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_TEMPH()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_pwr.h383 …((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TEMP…
384 …((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TEMP…
385 …((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VBAT…
408 …((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TEMPH)…
409 …((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TEMPL)…
410 …((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VBATH)…
Dstm32u5xx_ll_pwr.h3006 return ((READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == (PWR_BDSR_VBATH)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VBATH()
3017 return ((READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == (PWR_BDSR_TEMPL)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_TEMPL()
3028 return ((READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == (PWR_BDSR_TEMPH)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_TEMPH()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h667 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
Dstm32h523xx.h830 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
Dstm32h562xx.h877 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
Dstm32h533xx.h894 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
Dstm32h573xx.h1119 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
Dstm32h563xx.h1055 …__IO uint32_t BDSR; /*!< BacKup domain status register, Address offset: 0x28 … member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h902 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u535xx.h836 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u575xx.h899 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u585xx.h966 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u595xx.h936 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5a5xx.h1003 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5f7xx.h1097 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u599xx.h1117 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5g7xx.h1164 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5f9xx.h1201 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5a9xx.h1184 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member
Dstm32u5g9xx.h1268 …__IO uint32_t BDSR; /*!< Power backup domain status register, Address offset: 0x… member