/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/ |
D | stm32wbaxx_ll_adc.c | 407 MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_LT3 | ADC_AWD3TR_HT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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D | stm32wbaxx_hal_adc.c | 837 hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3); in HAL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/ |
D | stm32u0xx_ll_adc.c | 419 MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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D | stm32u0xx_hal_adc.c | 815 hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3); in HAL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/ |
D | stm32wlxx_ll_adc.c | 420 MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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D | stm32wlxx_hal_adc.c | 804 hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3); in HAL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/ |
D | stm32c0xx_ll_adc.c | 438 MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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D | stm32c0xx_hal_adc.c | 820 hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3); in HAL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/ |
D | stm32g0xx_ll_adc.c | 448 MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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D | stm32g0xx_hal_adc.c | 811 hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3); in HAL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_ll_adc.c | 769 MODIFY_REG(pADCx->AWD3TR, ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3, ADC_AWD3TR_HT3); in LL_ADC_DeInit()
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/hal_stm32-latest/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 129 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 147 #define TR3 AWD3TR
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D | stm32c031xx.h | 129 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 147 #define TR3 AWD3TR
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D | stm32c071xx.h | 134 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 152 #define TR3 AWD3TR
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/hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 131 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 149 #define TR3 AWD3TR
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D | stm32g050xx.h | 134 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 152 #define TR3 AWD3TR
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D | stm32g070xx.h | 135 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 153 #define TR3 AWD3TR
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D | stm32g031xx.h | 136 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 154 #define TR3 AWD3TR
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D | stm32g041xx.h | 137 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 155 #define TR3 AWD3TR
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D | stm32g051xx.h | 137 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 155 #define TR3 AWD3TR
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D | stm32g061xx.h | 138 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 156 #define TR3 AWD3TR
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D | stm32g071xx.h | 139 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 157 #define TR3 AWD3TR
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D | stm32g081xx.h | 140 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 158 #define TR3 AWD3TR
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/hal_stm32-latest/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 178 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 196 #define TR3 AWD3TR
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D | stm32wle5xx.h | 178 …__IO uint32_t AWD3TR; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x… member 196 #define TR3 AWD3TR
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