Home
last modified time | relevance | path

Searched refs:AWD1TR (Results 1 – 25 of 58) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h7044 preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, 0UL); in LL_ADC_SetAnalogWDThresholds()
7048 …preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK)) >> (ADC_AWD_TRX_R… in LL_ADC_SetAnalogWDThresholds()
7106 preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, 0UL); in LL_ADC_GetAnalogWDThresholds()
7111 …preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK)) >> (ADC_AWD_TRX_R… in LL_ADC_GetAnalogWDThresholds()
7218 preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, 0UL); in LL_ADC_ConfigAnalogWDThresholds()
7222 …preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, (((AWDy & ADC_AWD_TRX_REGOFFSET_MASK)) >> (ADC_AWD_TRX_R… in LL_ADC_ConfigAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h3891 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
3974 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4020 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h3816 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
3879 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
3926 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h4148 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
4231 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4278 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h4239 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
4321 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4367 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h4216 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
4299 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4346 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_adc.c401 MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_LT1 | ADC_AWD1TR_HT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32wbaxx_hal_adc.c835 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_adc.c413 MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32u0xx_hal_adc.c813 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_adc.c414 MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32wlxx_hal_adc.c802 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_adc.c432 MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32c0xx_hal_adc.c818 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_adc.c442 MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32g0xx_hal_adc.c809 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_adc.c763 MODIFY_REG(pADCx->AWD1TR, ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1, ADC_AWD1TR_HT1); in LL_ADC_DeInit()
Dstm32u5xx_hal_adc.c1135 hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1); in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h126 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
145 #define TR1 AWD1TR
Dstm32c031xx.h126 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
145 #define TR1 AWD1TR
Dstm32c071xx.h131 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
150 #define TR1 AWD1TR
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h128 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
147 #define TR1 AWD1TR
Dstm32g050xx.h131 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
150 #define TR1 AWD1TR
Dstm32g070xx.h132 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
151 #define TR1 AWD1TR
Dstm32g031xx.h133 …__IO uint32_t AWD1TR; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member
152 #define TR1 AWD1TR

123