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Searched refs:AHB4ENR (Results 1 – 25 of 52) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1425 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOAEN);\
1427 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOAEN);\
1433 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOBEN);\
1435 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOBEN);\
1441 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOCEN);\
1443 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOCEN);\
1449 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIODEN);\
1451 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIODEN);\
1457 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOEEN);\
1459 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOEEN);\
[all …]
Dstm32h7xx_ll_bus.h1387 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1389 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1436 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1U : 0U); in LL_AHB4_GRP1_IsEnabledClock()
1482 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
3960 SET_BIT(RCC_C1->AHB4ENR, Periphs); in LL_C1_AHB4_GRP1_EnableClock()
3962 tmpreg = READ_BIT(RCC_C1->AHB4ENR, Periphs); in LL_C1_AHB4_GRP1_EnableClock()
4009 return ((READ_BIT(RCC_C1->AHB4ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C1_AHB4_GRP1_IsEnabledClock()
4055 CLEAR_BIT(RCC_C1->AHB4ENR, Periphs); in LL_C1_AHB4_GRP1_DisableClock()
5719 SET_BIT(RCC_C2->AHB4ENR, Periphs); in LL_C2_AHB4_GRP1_EnableClock()
5721 tmpreg = READ_BIT(RCC_C2->AHB4ENR, Periphs); in LL_C2_AHB4_GRP1_EnableClock()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h1066 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOAEN);\
1068 tmpreg = READ_REG(RCC->AHB4ENR);\
1074 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOBEN);\
1076 tmpreg = READ_REG(RCC->AHB4ENR);\
1082 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOCEN);\
1084 tmpreg = READ_REG(RCC->AHB4ENR);\
1090 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIODEN);\
1092 tmpreg = READ_REG(RCC->AHB4ENR);\
1098 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOEEN);\
1100 tmpreg = READ_REG(RCC->AHB4ENR);\
[all …]
Dstm32h7rsxx_ll_bus.h857 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
859 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
898 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1U : 0U); in LL_AHB4_GRP1_IsEnabledClock()
936 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1147 … SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_OTFDEC1EN); \
1149 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_OTFDEC1EN); \
1157 … SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_SDMMC1EN); \
1159 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_SDMMC1EN); \
1167 … SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_SDMMC2EN); \
1169 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_SDMMC2EN); \
1177 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_FMCEN); \
1179 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_FMCEN); \
1187 … SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_OCTOSPI1EN); \
1189 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_OCTOSPI1EN); \
[all …]
Dstm32h5xx_ll_bus.h1280 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1282 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
1304 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClock()
1325 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dsystem_stm32wbaxx.c209 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
211 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
252 CLEAR_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
Dsystem_stm32wbaxx_s.c226 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
228 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
269 CLEAR_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); in SystemInit()
Dstm32wba50xx.h580 …__IO uint32_t AHB4ENR; /*!< AHB4 Peripherals Clock Enable Register Address … member
Dstm32wba52xx.h673 …__IO uint32_t AHB4ENR; /*!< AHB4 Peripherals Clock Enable Register Address … member
Dstm32wba54xx.h700 …__IO uint32_t AHB4ENR; /*!< AHB4 Peripherals Clock Enable Register Address … member
Dstm32wba5mxx.h700 …__IO uint32_t AHB4ENR; /*!< AHB4 Peripherals Clock Enable Register Address … member
Dstm32wba55xx.h700 …__IO uint32_t AHB4ENR; /*!< AHB4 Peripherals Clock Enable Register Address … member
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_bus.h728 SET_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
730 tmpreg = READ_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_EnableClock()
746 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClock()
761 CLEAR_BIT(RCC->AHB4ENR, Periphs); in LL_AHB4_GRP1_DisableClock()
Dstm32wbaxx_hal_rcc.h775 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_PWREN); \
777 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_PWREN); \
783 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); \
785 … tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN); \
789 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->AHB4ENR, RCC_AHB4ENR_PWREN)
790 #define __HAL_RCC_ADC4_CLK_DISABLE() CLEAR_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN)
1118 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_PWREN) != 0U)
1119 #define __HAL_RCC_ADC4_IS_CLK_ENABLED() (READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_ADC4EN) != 0U)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h1412 tmpreg = READ_REG(RCC->AHB4ENR); in LL_AHB4_GRP1_EnableClock()
1451 return ((READ_BIT(RCC->AHB4ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB4_GRP1_IsEnabledClock()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c1170 SET_BIT(RCC->AHB4ENR, (1UL << mco_gpio_index)); in HAL_RCC_MCOConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h1325 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1351 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h745xg.h1325 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1351 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h755xx.h1326 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1352 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h757xx.h1407 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1433 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h747xg.h1406 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1432 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h747xx.h1406 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
1432 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, A… member
Dstm32h7a3xx.h1127 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 peripheral clock register, … member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h904 …__IO uint32_t AHB4ENR; /*!< RCC AHB4 Peripherals Clock Enable Register … member

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