Searched refs:AHB2SMENR1 (Results 1 – 14 of 14) sorted by relevance
| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_hal_rcc.h | 3262 #define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOASM…
3264 #define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOBSM…
3266 #define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOCSM…
3268 #define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIODSM…
3270 #define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOESM…
3273 #define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOFSM…
3276 #define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOGSM…
3278 #define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOHSM…
3281 #define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOISM…
3285 #define __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR1, RCC_AHB2SMENR1_GPIOJSM…
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| D | stm32u5xx_ll_bus.h | 1185 SET_BIT(RCC->AHB2SMENR1, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
1187 tmpreg = READ_BIT(RCC->AHB2SMENR1, Periphs); in LL_AHB2_GRP1_EnableClockStopSleep()
1254 return ((READ_BIT(RCC->AHB2SMENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB2_GRP1_IsEnabledClockStopSleep()
1320 CLEAR_BIT(RCC->AHB2SMENR1, Periphs); in LL_AHB2_GRP1_DisableClockStopSleep()
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| /hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
| D | stm32u545xx.h | 991 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u535xx.h | 925 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u575xx.h | 991 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u585xx.h | 1058 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u595xx.h | 1032 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5a5xx.h | 1099 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5f7xx.h | 1194 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u599xx.h | 1213 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5g7xx.h | 1261 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5f9xx.h | 1298 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5a9xx.h | 1280 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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| D | stm32u5g9xx.h | 1365 …__IO uint32_t AHB2SMENR1; /*!< AHB2 Peripherals Clock Enable in Sleep and Stop Modes Register 1… member
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