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Searched refs:ADC_SQR1_SQ28_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l100xc.h1180 #define ADC_SQR1_SQ28_Pos (15U) macro
1181 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1183 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1184 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1185 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1186 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1187 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l151xc.h1238 #define ADC_SQR1_SQ28_Pos (15U) macro
1239 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1241 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1242 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1243 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1244 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1245 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l151xca.h1242 #define ADC_SQR1_SQ28_Pos (15U) macro
1243 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1245 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1246 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1247 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1248 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1249 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l151xdx.h1259 #define ADC_SQR1_SQ28_Pos (15U) macro
1260 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1262 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1263 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1264 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1265 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1266 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l151xe.h1259 #define ADC_SQR1_SQ28_Pos (15U) macro
1260 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1262 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1263 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1264 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1265 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1266 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l152xc.h1234 #define ADC_SQR1_SQ28_Pos (15U) macro
1235 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1237 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1238 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1239 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1240 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1241 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l152xca.h1259 #define ADC_SQR1_SQ28_Pos (15U) macro
1260 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1262 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1263 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1264 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1265 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1266 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l152xdx.h1276 #define ADC_SQR1_SQ28_Pos (15U) macro
1277 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1279 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1280 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1281 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1282 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1283 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l152xe.h1276 #define ADC_SQR1_SQ28_Pos (15U) macro
1277 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1279 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1280 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1281 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1282 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1283 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l162xc.h1257 #define ADC_SQR1_SQ28_Pos (15U) macro
1258 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1260 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1261 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1262 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1263 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1264 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l162xca.h1282 #define ADC_SQR1_SQ28_Pos (15U) macro
1283 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1285 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1286 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1287 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1288 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1289 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l162xdx.h1299 #define ADC_SQR1_SQ28_Pos (15U) macro
1300 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1302 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1303 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1304 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1305 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1306 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l162xe.h1299 #define ADC_SQR1_SQ28_Pos (15U) macro
1300 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1302 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1303 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1304 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1305 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1306 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l151xd.h1316 #define ADC_SQR1_SQ28_Pos (15U) macro
1317 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1319 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1320 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1321 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1322 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1323 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l152xd.h1333 #define ADC_SQR1_SQ28_Pos (15U) macro
1334 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1336 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1337 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1338 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1339 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1340 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */
Dstm32l162xd.h1356 #define ADC_SQR1_SQ28_Pos (15U) macro
1357 #define ADC_SQR1_SQ28_Msk (0x1FUL << ADC_SQR1_SQ28_Pos) /*!< 0x000F8000 */
1359 #define ADC_SQR1_SQ28_0 (0x01UL << ADC_SQR1_SQ28_Pos) /*!< 0x00008000 */
1360 #define ADC_SQR1_SQ28_1 (0x02UL << ADC_SQR1_SQ28_Pos) /*!< 0x00010000 */
1361 #define ADC_SQR1_SQ28_2 (0x04UL << ADC_SQR1_SQ28_Pos) /*!< 0x00020000 */
1362 #define ADC_SQR1_SQ28_3 (0x08UL << ADC_SQR1_SQ28_Pos) /*!< 0x00040000 */
1363 #define ADC_SQR1_SQ28_4 (0x10UL << ADC_SQR1_SQ28_Pos) /*!< 0x00080000 */