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Searched refs:ADC_SMPR1_SMP28_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l151xc.h1042 #define ADC_SMPR1_SMP28_Pos (24U) macro
1043 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1045 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1046 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1047 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xca.h1046 #define ADC_SMPR1_SMP28_Pos (24U) macro
1047 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1049 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1050 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1051 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xdx.h1063 #define ADC_SMPR1_SMP28_Pos (24U) macro
1064 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1066 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1067 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1068 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xe.h1063 #define ADC_SMPR1_SMP28_Pos (24U) macro
1064 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1066 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1067 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1068 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xca.h1063 #define ADC_SMPR1_SMP28_Pos (24U) macro
1064 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1066 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1067 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1068 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xdx.h1080 #define ADC_SMPR1_SMP28_Pos (24U) macro
1081 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1083 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1084 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1085 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xe.h1080 #define ADC_SMPR1_SMP28_Pos (24U) macro
1081 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1083 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1084 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1085 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xca.h1086 #define ADC_SMPR1_SMP28_Pos (24U) macro
1087 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1089 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1090 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1091 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xdx.h1103 #define ADC_SMPR1_SMP28_Pos (24U) macro
1104 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1106 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1107 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1108 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xe.h1103 #define ADC_SMPR1_SMP28_Pos (24U) macro
1104 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1106 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1107 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1108 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xd.h1120 #define ADC_SMPR1_SMP28_Pos (24U) macro
1121 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1123 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1124 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1125 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xd.h1137 #define ADC_SMPR1_SMP28_Pos (24U) macro
1138 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1140 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1141 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1142 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xd.h1160 #define ADC_SMPR1_SMP28_Pos (24U) macro
1161 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1163 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1164 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1165 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */