Searched refs:ADC_SMPR1_SMP27_Pos (Results 1 – 13 of 13) sorted by relevance
1035 #define ADC_SMPR1_SMP27_Pos (21U) macro1036 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1038 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1039 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1040 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1039 #define ADC_SMPR1_SMP27_Pos (21U) macro1040 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1042 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1043 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1044 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1056 #define ADC_SMPR1_SMP27_Pos (21U) macro1057 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1059 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1060 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1061 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1073 #define ADC_SMPR1_SMP27_Pos (21U) macro1074 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1076 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1077 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1078 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1079 #define ADC_SMPR1_SMP27_Pos (21U) macro1080 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1082 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1083 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1084 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1096 #define ADC_SMPR1_SMP27_Pos (21U) macro1097 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1099 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1100 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1101 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1113 #define ADC_SMPR1_SMP27_Pos (21U) macro1114 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1116 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1117 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1118 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1130 #define ADC_SMPR1_SMP27_Pos (21U) macro1131 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1133 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1134 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1135 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
1153 #define ADC_SMPR1_SMP27_Pos (21U) macro1154 #define ADC_SMPR1_SMP27_Msk (0x7UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00E00000 */1156 #define ADC_SMPR1_SMP27_0 (0x1UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00200000 */1157 #define ADC_SMPR1_SMP27_1 (0x2UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00400000 */1158 #define ADC_SMPR1_SMP27_2 (0x4UL << ADC_SMPR1_SMP27_Pos) /*!< 0x00800000 */
