Searched refs:ADC_SMPR0_SMP31_Pos (Results 1 – 12 of 12) sorted by relevance
1575 #define ADC_SMPR0_SMP31_Pos (3U) macro1576 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1578 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1579 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1580 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1592 #define ADC_SMPR0_SMP31_Pos (3U) macro1593 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1595 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1596 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1597 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1609 #define ADC_SMPR0_SMP31_Pos (3U) macro1610 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1612 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1613 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1614 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1615 #define ADC_SMPR0_SMP31_Pos (3U) macro1616 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1618 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1619 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1620 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1632 #define ADC_SMPR0_SMP31_Pos (3U) macro1633 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1635 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1636 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1637 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1649 #define ADC_SMPR0_SMP31_Pos (3U) macro1650 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1652 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1653 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1654 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1666 #define ADC_SMPR0_SMP31_Pos (3U) macro1667 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1669 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1670 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1671 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
1689 #define ADC_SMPR0_SMP31_Pos (3U) macro1690 #define ADC_SMPR0_SMP31_Msk (0x7UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000038 */1692 #define ADC_SMPR0_SMP31_0 (0x1UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000008 */1693 #define ADC_SMPR0_SMP31_1 (0x2UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000010 */1694 #define ADC_SMPR0_SMP31_2 (0x4UL << ADC_SMPR0_SMP31_Pos) /*!< 0x00000020 */
