Searched refs:ADC_CHSELR_CHSEL2_Pos (Results 1 – 25 of 78) sorted by relevance
1234
812 #define ADC_CHSELR_CHSEL2_Pos (2U) macro813 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
828 #define ADC_CHSELR_CHSEL2_Pos (2U) macro829 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
857 #define ADC_CHSELR_CHSEL2_Pos (2U) macro858 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
822 #define ADC_CHSELR_CHSEL2_Pos (2U) macro823 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
844 #define ADC_CHSELR_CHSEL2_Pos (2U) macro845 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
821 #define ADC_CHSELR_CHSEL2_Pos (2U) macro822 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
880 #define ADC_CHSELR_CHSEL2_Pos (2U) macro881 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
927 #define ADC_CHSELR_CHSEL2_Pos (2U) macro928 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
928 #define ADC_CHSELR_CHSEL2_Pos (2U) macro929 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
871 #define ADC_CHSELR_CHSEL2_Pos (2U) macro872 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
829 #define ADC_CHSELR_CHSEL2_Pos (2U) macro830 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
834 #define ADC_CHSELR_CHSEL2_Pos (2U) macro835 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
841 #define ADC_CHSELR_CHSEL2_Pos (2U) macro842 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
862 #define ADC_CHSELR_CHSEL2_Pos (2U) macro863 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
850 #define ADC_CHSELR_CHSEL2_Pos (2U) macro851 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
885 #define ADC_CHSELR_CHSEL2_Pos (2U) macro886 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
827 #define ADC_CHSELR_CHSEL2_Pos (2U) macro828 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
907 #define ADC_CHSELR_CHSEL2_Pos (2U) macro908 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
994 #define ADC_CHSELR_CHSEL2_Pos (2U) macro995 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
1015 #define ADC_CHSELR_CHSEL2_Pos (2U) macro1016 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
1013 #define ADC_CHSELR_CHSEL2_Pos (2U) macro1014 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
1110 #define ADC_CHSELR_CHSEL2_Pos (2U) macro1111 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */
1114 #define ADC_CHSELR_CHSEL2_Pos (2U) macro1115 #define ADC_CHSELR_CHSEL2_Msk (0x1UL << ADC_CHSELR_CHSEL2_Pos) /*!< 0x00000004 */