Searched refs:ADC_CFGR1_EXTSEL_4 (Results 1 – 18 of 18) sorted by relevance
1082 #define LL_ADC_REG_TRIG_EXT_TIM7_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*…1085 #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_0 \1089 #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_1 \1093 #define LL_ADC_REG_TRIG_EXT_TIM9_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_1 \1098 #define LL_ADC_REG_TRIG_EXT_TIM9_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 \1102 #define LL_ADC_REG_TRIG_EXT_TIM12_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 \1106 #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 \1110 #define LL_ADC_REG_TRIG_EXT_TIM18_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 \1115 #define LL_ADC_REG_TRIG_EXT_LPTIM1_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_3 \1119 #define LL_ADC_REG_TRIG_EXT_LPTIM2_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_3 \[all …]
1235 #define LL_ADC_REG_TRIG_EXT_EXTI_LINE15 (ADC_CFGR1_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …1236 #define LL_ADC_REG_TRIG_EXT_LPTIM1_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_1 | ADC_REG_TRIG_EXT…1237 #define LL_ADC_REG_TRIG_EXT_LPTIM2_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL…1239 #define LL_ADC_REG_TRIG_EXT_LPTIM3_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 | ADC_REG_TRIG_EXT…1240 #define LL_ADC_REG_TRIG_EXT_LPTIM4_OUT (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL…
3219 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3055 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3457 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3670 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3592 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3805 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3888 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
3880 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
4101 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
4008 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
4093 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
4221 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
5166 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
5665 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
5587 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
5244 #define ADC_CFGR1_EXTSEL_4 (0x10UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000200 */ macro
