Searched refs:ADC4_SMPR_SMP1_Pos (Results 1 – 12 of 12) sorted by relevance
3435 #define ADC4_SMPR_SMP1_Pos (0U) macro3436 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */3438 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */3439 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */3440 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
3271 #define ADC4_SMPR_SMP1_Pos (0U) macro3272 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */3274 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */3275 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */3276 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
3673 #define ADC4_SMPR_SMP1_Pos (0U) macro3674 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */3676 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */3677 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */3678 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
3886 #define ADC4_SMPR_SMP1_Pos (0U) macro3887 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */3889 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */3890 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */3891 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
3808 #define ADC4_SMPR_SMP1_Pos (0U) macro3809 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */3811 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */3812 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */3813 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4021 #define ADC4_SMPR_SMP1_Pos (0U) macro4022 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4024 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4025 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4026 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4104 #define ADC4_SMPR_SMP1_Pos (0U) macro4105 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4107 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4108 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4109 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4096 #define ADC4_SMPR_SMP1_Pos (0U) macro4097 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4099 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4100 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4101 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4317 #define ADC4_SMPR_SMP1_Pos (0U) macro4318 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4320 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4321 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4322 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4224 #define ADC4_SMPR_SMP1_Pos (0U) macro4225 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4227 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4228 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4229 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4309 #define ADC4_SMPR_SMP1_Pos (0U) macro4310 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4312 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4313 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4314 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
4437 #define ADC4_SMPR_SMP1_Pos (0U) macro4438 #define ADC4_SMPR_SMP1_Msk (0x7UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000007 */4440 #define ADC4_SMPR_SMP1_0 (0x1UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000001 */4441 #define ADC4_SMPR_SMP1_1 (0x2UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000002 */4442 #define ADC4_SMPR_SMP1_2 (0x4UL << ADC4_SMPR_SMP1_Pos) /*!< 0x00000004 */
