Searched refs:ADC4_PWRR_VREFSECSMP_Pos (Results 1 – 12 of 12) sorted by relevance
3808 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro3809 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */3822 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
3644 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro3645 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */3658 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4046 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4047 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4060 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4259 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4260 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4273 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4181 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4182 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4195 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4394 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4395 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4408 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4477 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4478 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4491 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4469 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4470 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4483 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4690 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4691 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4704 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4597 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4598 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4611 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4682 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4683 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4696 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
4810 #define ADC4_PWRR_VREFSECSMP_Pos (3U) macro4811 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */4824 #define ADC4_PW_VREFSECSMP_Pos ADC4_PWRR_VREFSECSMP_Pos
