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Searched refs:ADC4_PWRR_VREFSECSMP_Msk (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h3809 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
3810 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
3823 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u535xx.h3645 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
3646 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
3659 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u575xx.h4047 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4048 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4061 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u585xx.h4260 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4261 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4274 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u595xx.h4182 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4183 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4196 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5a5xx.h4395 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4396 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4409 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5f7xx.h4478 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4479 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4492 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u599xx.h4470 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4471 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4484 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5g7xx.h4691 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4692 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4705 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5f9xx.h4598 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4599 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4612 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5a9xx.h4683 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4684 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4697 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk
Dstm32u5g9xx.h4811 #define ADC4_PWRR_VREFSECSMP_Msk (0x1UL << ADC4_PWRR_VREFSECSMP_Pos) /*!< 0x00000008 */ macro
4812 #define ADC4_PWRR_VREFSECSMP ADC4_PWRR_VREFSECSMP_Msk /*!< ADC Vref Secon…
4825 #define ADC4_PW_VREFSECSMP_Msk ADC4_PWRR_VREFSECSMP_Msk