/hal_stm32-3.7.0/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5764 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 5765 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f051x8.h | 5795 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 5796 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f071xb.h | 6348 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6349 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f048xx.h | 9534 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 9535 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f042x6.h | 9570 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 9571 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f072xb.h | 10145 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10146 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f078xx.h | 10115 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10116 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f091xc.h | 10802 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10803 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f098xx.h | 10769 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10770 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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/hal_stm32-3.7.0/stm32cube/stm32l0xx/soc/ |
D | stm32l062xx.h | 6458 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6459 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l053xx.h | 6480 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6481 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l052xx.h | 6321 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6322 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l073xx.h | 6776 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6777 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l082xx.h | 6754 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6755 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l083xx.h | 6913 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6914 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l063xx.h | 6615 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6616 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32l072xx.h | 6617 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 6618 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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/hal_stm32-3.7.0/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7582 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 7583 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f318xx.h | 7569 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 7570 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f373xc.h | 10760 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10761 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f378xx.h | 10658 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 10659 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f302x8.h | 11213 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 11214 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f302xc.h | 11495 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 11496 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f303x8.h | 11075 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 11076 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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D | stm32f358xx.h | 12062 #define TSC_IOSCR_G8_IO4_Pos (31U) macro 12063 #define TSC_IOSCR_G8_IO4_Msk (0x1UL << TSC_IOSCR_G8_IO4_Pos) /*!< 0x80000000 */
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