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Searched refs:TIM_CR1_CEN (Results 1 – 25 of 304) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_tim.h885 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
896 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
907 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
Dstm32l1xx_hal_tim.h890 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
901 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_tim.h903 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
914 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
925 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
Dstm32l0xx_hal_tim.h889 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
900 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_tim.h1096 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1107 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1118 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_tim.h1075 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1086 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1097 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
Dstm32f0xx_hal_tim.h1073 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
1093 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_tim.h1056 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1067 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1078 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_tim.h1118 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1129 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1140 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_tim.h1315 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1326 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1337 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_tim.h1372 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1383 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1394 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_tim.h1463 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1474 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1485 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_tim.h1420 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1431 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1442 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_tim.h1525 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1536 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1547 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_tim.h1432 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1443 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1454 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
Dstm32mp1xx_hal_tim.h1129 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
1149 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_tim.h1462 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1473 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1484 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_tim.h1424 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1435 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1446 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_tim.h1480 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1491 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1502 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_tim.h1588 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1599 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1610 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h1776 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1787 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1798 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h1665 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1676 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1687 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h1652 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1663 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1674 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h1892 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
1903 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
1914 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h2025 SET_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_EnableCounter()
2036 CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); in LL_TIM_DisableCounter()
2047 return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); in LL_TIM_IsEnabledCounter()

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