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Searched refs:RCC_IOPENR_GPIODEN (Results 1 – 25 of 32) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h628 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
630 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
646 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN)
847 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) != RESET)
855 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) == RESET)
Dstm32c0xx_ll_bus.h125 #define LL_IOP_GRP1_PERIPH_GPIOD RCC_IOPENR_GPIODEN
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc_ex.h650 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
652 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
655 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR,(RCC_IOPENR_GPIODEN))
657 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) != 0U)
658 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) == 0U)
Dstm32l0xx_ll_bus.h176 #define LL_IOP_GRP1_PERIPH_GPIOD RCC_IOPENR_GPIODEN /*!< GPIO port D control */
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h965 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
967 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
992 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN)
1502 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) != RESET)
1512 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) == RESET)
Dstm32g0xx_ll_bus.h209 #define LL_IOP_GRP1_PERIPH_GPIOD RCC_IOPENR_GPIODEN
/hal_stm32-3.7.0/stm32cube/stm32l0xx/soc/
Dstm32l010x8.h3449 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l051xx.h3705 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l010xb.h3467 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l081xx.h3910 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l071xx.h3779 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l062xx.h4161 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l053xx.h4177 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l052xx.h4030 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l073xx.h4353 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l082xx.h4339 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l083xx.h4484 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l063xx.h4306 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
Dstm32l072xx.h4208 #define RCC_IOPENR_GPIODEN RCC_IOPENR_IOPDEN /*!< GPIO port D clock enable … macro
/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h4296 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro
/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h4461 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro
Dstm32g030xx.h4298 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro
Dstm32g050xx.h4326 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro
Dstm32g031xx.h4500 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro
Dstm32g041xx.h4742 #define RCC_IOPENR_GPIODEN RCC_IOPENR_GPIODEN_Msk macro

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