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Searched refs:TSC_IOCCR_G3_IO1_Pos (Results 1 – 25 of 77) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/
Dstm32f051x8.h5824 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
5825 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f058xx.h5793 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
5794 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f071xb.h6377 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6378 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f042x6.h9599 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
9600 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f048xx.h9563 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
9564 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f072xb.h10174 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10175 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f078xx.h10144 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10145 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f098xx.h10798 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10799 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f091xc.h10831 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10832 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6350 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6351 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l053xx.h6509 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6510 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l062xx.h6487 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6488 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l063xx.h6644 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6645 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l072xx.h6646 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6647 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l073xx.h6805 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6806 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l082xx.h6783 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6784 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l083xx.h6942 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
6943 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
/hal_stm32-3.6.0/stm32cube/stm32f3xx/soc/
Dstm32f318xx.h7598 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
7599 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f301x8.h7611 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
7612 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f373xc.h10785 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10786 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32f378xx.h10683 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
10684 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9431 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
9432 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
/hal_stm32-3.6.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h9280 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
9281 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
Dstm32l422xx.h9505 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
9506 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */
/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h8240 #define TSC_IOCCR_G3_IO1_Pos (8U) macro
8241 #define TSC_IOCCR_G3_IO1_Msk (0x1UL << TSC_IOCCR_G3_IO1_Pos) /*!< 0x00000100 */

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