/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_tim_ex.h | 113 #define TIM_TIM1_ETR_HSI TIM1_AF1_ETRSEL_2 /*!… 114 #define TIM_TIM1_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!… 116 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!… 117 #define TIM_TIM1_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_0) /*!… 123 #define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!… 124 #define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!… 126 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!… 133 #define TIM_TIM2_ETR_HSI TIM1_AF1_ETRSEL_2 /*!… 134 #define TIM_TIM2_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!… 136 #define TIM_TIM2_ETR_DCMI_VSYNC (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!… [all …]
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D | stm32u5xx_ll_tim.h | 1035 #define LL_TIM_TIM1_ETRSOURCE_HSI TIM1_AF1_ETRSEL_2 … 1036 #define LL_TIM_TIM1_ETRSOURCE_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 1038 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) … 1039 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_0… 1045 #define LL_TIM_TIM1_ETRSOURCE_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) … 1046 #define LL_TIM_TIM1_ETRSOURCE_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_… 1048 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_… 1061 #define LL_TIM_TIM2_ETRSOURCE_HSI TIM1_AF1_ETRSEL_2 … 1062 #define LL_TIM_TIM2_ETRSOURCE_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 1064 #define LL_TIM_TIM2_ETRSOURCE_DCMI_VSYNC (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) … [all …]
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_tim_ex.h | 111 #define TIM_TIM1_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< … 113 #define TIM_TIM1_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< … 116 #define TIM_TIM1_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< … 119 #define TIM_TIM1_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< … 126 #define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< … 127 #define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< … 134 #define TIM_TIM2_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< … 136 #define TIM_TIM2_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< … 139 #define TIM_TIM2_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< … 142 #define TIM_TIM2_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)/* !< … [all …]
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D | stm32g4xx_ll_tim.h | 1026 #define LL_TIM_TIM1_ETRSOURCE_COMP4 TIM1_AF1_ETRSEL_2 … 1028 #define LL_TIM_TIM1_ETRSOURCE_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 1031 #define LL_TIM_TIM1_ETRSOURCE_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) … 1034 #define LL_TIM_TIM1_ETRSOURCE_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_… 1041 #define LL_TIM_TIM1_ETRSOURCE_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) … 1042 #define LL_TIM_TIM1_ETRSOURCE_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_… 1055 #define LL_TIM_TIM2_ETRSOURCE_COMP4 TIM1_AF1_ETRSEL_2 … 1057 #define LL_TIM_TIM2_ETRSOURCE_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 1060 #define LL_TIM_TIM2_ETRSOURCE_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) … 1063 #define LL_TIM_TIM2_ETRSOURCE_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL… [all …]
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/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_hal_tim_ex.h | 94 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_AF1_ETRSEL_2 /* !< TIM1_ETR is c… 95 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is c… 97 #define TIM_TIM1_ETR_COMP3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is c… 106 #define TIM_TIM2_ETR_MCO2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM2_ETR is c… 107 #define TIM_TIM2_ETR_COMP3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM2_ETR is c…
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D | stm32g0xx_ll_tim.h | 993 #define LL_TIM_ETRSOURCE_COMP3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR inp… 996 #define LL_TIM_ETRSOURCE_ADC1_AWD2 TIM1_AF1_ETRSEL_2 /*… 997 #define LL_TIM_ETRSOURCE_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR inp… 999 #define LL_TIM_ETRSOURCE_MCO TIM1_AF1_ETRSEL_2 /*… 1000 #define LL_TIM_ETRSOURCE_MCO2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR inp…
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/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_tim_ex.h | 114 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_AF1_ETRSEL_2 /*!… 115 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!… 123 #define TIM_TIM2_ETR_SAI1_FSA TIM1_AF1_ETRSEL_2 /*!… 124 #define TIM_TIM2_ETR_SAI1_FSB (TIM1_AF1_ETRSEL_0 | TIM1_AF1_ETRSEL_2) /*!… 134 #define TIM_TIM2_ETR_ETH_PPS (TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_3 ) /*!… 149 #define TIM_TIM3_ETR_ETH_PPS (TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_3 ) /*!… 171 #define TIM_TIM8_ETR_ADC2_AWD2 TIM1_AF1_ETRSEL_2 /*!… 172 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!…
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D | stm32h5xx_ll_tim.h | 1039 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD2 TIM1_AF1_ETRSEL_2 … 1040 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 1054 #define LL_TIM_TIM2_ETRSOURCE_SAI1_FSA TIM1_AF1_ETRSEL_2 … 1055 #define LL_TIM_TIM2_ETRSOURCE_SAI1_FSB (TIM1_AF1_ETRSEL_0 | TIM1_AF1_ETRSEL_2) … 1065 #define LL_TIM_TIM2_ETRSOURCE_ETH_PPS (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_… 1086 #define LL_TIM_TIM3_ETRSOURCE_ETH_PPS (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_… 1126 #define LL_TIM_TIM8_ETRSOURCE_ADC2_AWD2 TIM1_AF1_ETRSEL_2 … 1127 #define LL_TIM_TIM8_ETRSOURCE_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) …
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/hal_stm32-3.6.0/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_hal_tim_ex.h | 92 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< … 93 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< … 94 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< … 95 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< …
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D | stm32mp1xx_ll_tim.h | 933 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD2 TIM1_AF1_ETRSEL_2 … 934 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ET… 935 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ET… 936 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_A… 941 #define LL_TIM_TIM8_ETRSOURCE_ADC1_AWD2 TIM1_AF1_ETRSEL_2 … 942 #define LL_TIM_TIM8_ETRSOURCE_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ET… 943 #define LL_TIM_TIM8_ETRSOURCE_ADC2_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ET… 944 #define LL_TIM_TIM8_ETRSOURCE_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_A… 949 #define LL_TIM_TIM2_ETRSOURCE_SAI1_FSA TIM1_AF1_ETRSEL_2 … 950 #define LL_TIM_TIM2_ETRSOURCE_SAI1_FSB (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ET… [all …]
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/hal_stm32-3.6.0/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_tim_ex.h | 95 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /*!< T… 96 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< T… 97 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< T… 98 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< T…
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D | stm32h7xx_ll_tim.h | 986 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) … 987 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) … 988 #define LL_TIM_TIM1_ETRSOURCE_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) … 989 #define LL_TIM_TIM1_ETRSOURCE_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_…
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/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 6643 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g050xx.h | 6504 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g030xx.h | 6443 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g051xx.h | 7106 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g031xx.h | 6707 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g041xx.h | 7011 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g061xx.h | 7410 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g071xx.h | 7490 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g0b0xx.h | 7820 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32g081xx.h | 7794 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 9385 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32wle5xx.h | 9385 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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D | stm32wl54xx.h | 11057 #define TIM1_AF1_ETRSEL_2 (0x4UL << TIM1_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
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