| /hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/ |
| D | stm32wbaxx_hal_rcc.c | 888 …(((tmpreg2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) != (RCC_OscInitStruct->PLL1.PLLR - 1u)… in HAL_RCC_OscConfig()
1425 pllr = ((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in HAL_RCC_GetPLL1RFreq()
1506 RCC_OscInitStruct->PLL1.PLLR = (((regvalue & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); in HAL_RCC_GetOscConfig()
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| /hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_rcc.h | 2309 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1R()
2459 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
2470 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
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| /hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_rcc.c | 1298 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1809 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); in HAL_RCC_GetSysClockFreq()
1956 …pRCC_OscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Po… in HAL_RCC_GetOscConfig()
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| D | stm32u5xx_hal_rcc_ex.c | 1561 … RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/ |
| D | system_stm32u5xx.c | 335 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
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| D | system_stm32u5xx_s.c | 358 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
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| D | stm32u535xx.h | 14114 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u545xx.h | 14627 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u575xx.h | 15485 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| /hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/ |
| D | system_stm32wbaxx.c | 320 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
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| D | system_stm32wbaxx_s.c | 342 pllr = ((tmp2 & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U; in SystemCoreClockUpdate()
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| D | stm32wba50xx.h | 6064 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32wba52xx.h | 9837 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32wba54xx.h | 10109 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32wba55xx.h | 10127 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| /hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_rcc.c | 961 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1608 …pOscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) +… in HAL_RCC_GetOscConfig()
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| D | stm32h5xx_hal_rcc_ex.c | 2867 … RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_rcc.h | 3894 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SYS()
4065 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4077 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
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| D | stm32u5xx_hal_rcc.h | 4459 RCC_PLL1DIVR_PLL1R), ( (((__PLL1N__) - 1U ) & RCC_PLL1DIVR_PLL1N) |\
4465 RCC_PLL1DIVR_PLL1R))); \
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| /hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_rcc.h | 4420 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4431 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
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| D | stm32h5xx_hal_rcc.h | 4574 … ((((__PLL1R__) - 1U) << RCC_PLL1DIVR_PLL1R_Pos) & RCC_PLL1DIVR_PLL1R))); \
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| /hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/ |
| D | stm32h503xx.h | 8967 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h562xx.h | 13392 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h563xx.h | 15476 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h573xx.h | 16021 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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