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Searched refs:RCC_IOPENR_GPIOAEN (Results 1 – 25 of 39) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h718 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
720 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
749 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN)
817 #define __HAL_RCC_GPIOA_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) != 0U)
821 #define __HAL_RCC_GPIOA_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) == 0U)
Dstm32l0xx_ll_bus.h172 #define LL_IOP_GRP1_PERIPH_GPIOA RCC_IOPENR_GPIOAEN /*!< GPIO port A control */
/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h604 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
606 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
642 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN)
843 #define __HAL_RCC_GPIOA_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) != RESET)
851 #define __HAL_RCC_GPIOA_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) == RESET)
Dstm32c0xx_ll_bus.h121 #define LL_IOP_GRP1_PERIPH_GPIOA RCC_IOPENR_GPIOAEN
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h907 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
909 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
955 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN)
1465 #define __HAL_RCC_GPIOA_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) != RESET)
1475 #define __HAL_RCC_GPIOA_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) == RESET)
Dstm32g0xx_ll_bus.h206 #define LL_IOP_GRP1_PERIPH_GPIOA RCC_IOPENR_GPIOAEN
/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/
Dstm32l051xx.h3702 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l010x4.h3412 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l011xx.h3521 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l021xx.h3652 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l031xx.h3611 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l041xx.h3742 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l010x6.h3440 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l010x8.h3446 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l010xb.h3464 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l071xx.h3776 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l081xx.h3907 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l052xx.h4027 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l053xx.h4174 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l062xx.h4158 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l063xx.h4303 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l072xx.h4205 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
Dstm32l073xx.h4350 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_IOPAEN /*!< GPIO port A clock enable … macro
/hal_stm32-3.6.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h4287 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_GPIOAEN_Msk macro
Dstm32c011xx.h4133 #define RCC_IOPENR_GPIOAEN RCC_IOPENR_GPIOAEN_Msk macro

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