Home
last modified time | relevance | path

Searched refs:RCC_APBENR2_TIM14EN (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h771 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN); \
773 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN); \
807 #define __HAL_RCC_TIM14_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN)
902 #define __HAL_RCC_TIM14_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN) != 0U)
911 #define __HAL_RCC_TIM14_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN) == 0U)
Dstm32c0xx_ll_bus.h108 #define LL_APB2_GRP1_PERIPH_TIM14 RCC_APBENR2_TIM14EN
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1294 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN); \
1296 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN); \
1409 #define __HAL_RCC_TIM14_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN)
1641 #define __HAL_RCC_TIM14_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN) != 0U)
1653 #define __HAL_RCC_TIM14_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM14EN) == 0U)
Dstm32g0xx_ll_bus.h184 #define LL_APB2_GRP1_PERIPH_TIM14 RCC_APBENR2_TIM14EN
/hal_stm32-3.6.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h4350 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32c011xx.h4193 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h4527 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g050xx.h4386 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g030xx.h4352 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g051xx.h4923 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g031xx.h4566 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g041xx.h4814 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g061xx.h5171 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g071xx.h5288 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g0b0xx.h5573 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g081xx.h5536 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g0b1xx.h6646 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro
Dstm32g0c1xx.h6894 #define RCC_APBENR2_TIM14EN RCC_APBENR2_TIM14EN_Msk macro